85357AG-01LF IDT, 85357AG-01LF Datasheet
85357AG-01LF
Specifications of 85357AG-01LF
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85357AG-01LF Summary of contents
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... OSC XT ALOUT1 XTALIN2 OSC 10 XT ALOUT2 XTALIN3 11 OSC XT ALOUT3 SEL1 85357AG-11 4 EATURES or 2:1, Crystal One differential 3.3V LVPECL output 4:1 or 2:1 Crystal Oscillator Multiplexer Supports parallel resonant crystals with a frequency range of 10MHz to 27MHz. The oscillator circuit is optimized for parallel resonant mode, and will require external capacitance ...
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... 85357AG-11 4 ...
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... C OR 4.6V NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the + 0 device. These ratings are stress specifications only. Functional + 0.5V operation of product at these conditions or any conditions be- ...
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... UTPUT OAD EST IRCUIT nQ0 Q0 Pulse Width t PERIOD t PW odc = t PERIOD UTPUT UTY YCLE ULSE IDTH 85357AG-11 4 EASUREMENT SCOPE Qx Clock 20% nQx Outputs O R UTPUT ISE ERIOD www.idt.com 4 ICS85357-11 2: RYSTAL SCILLATOR TO LVPECL / ECL M ULTIPLEXER NFORMATION ...
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... ESULTS OF RYSTAL Crystal Frequency C1 (MHz) (pF) 14.31818 22 15.00 22 16.66 22 19.44 22 24.00 22 85357AG-11 4:1 2: PPLICATION NFORMATION suitable for most applications. Additional accuracy can be achieved by adding two small capacitors C1 and C2 as shown in Figure 1 . Typical results using parallel 18pF crystals are shown in Table 7. XTAL_IN C1 22p X1 XTAL_OUT ...
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... 2A. LVPECL O IGURE UTPUT 85357AG-11 4:1 2: transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 2A and 2B show two different layouts which are recommended only as guidelines. Other suitable clock lay- outs may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations ...
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... ABLE HERMAL ESISTANCE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. 85357AG-11 4:1 2: OWER ONSIDERATIONS = 3. 3.465V, which gives worst case results. ...
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... Pd_L is the power dissipation when the output drives low. Pd_H = [(V – 2V))/ OH_MAX CC_MAX L [(2V - 0.9V)/ 0.9V = 19.8mW Pd_L = [(V – 2V))/ OL_MAX CC_MAX L [(2V - 1.7V)/ 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW 85357AG-11 4:1 2: LVPECL RIVER IRCUIT AND – 0.9V CC_MAX – 1.7V CC_MAX - V ...
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... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS85357-11 is: 413 85357AG-11 4:1 2: ELIABILITY NFORMATION ...
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... ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MO-153 85357AG-11 4:1 2: TSSOP EAD 10 ACKAGE IMENSIONS ...
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... Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. 85357AG-11 4:1 ...
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... 85357AG-11 4 ...
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... Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA 85357AG-11 4:1 2: ...