8S89831AKILFT IDT, 8S89831AKILFT Datasheet - Page 2

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8S89831AKILFT

Manufacturer Part Number
8S89831AKILFT
Description
Clock Drivers & Distribution 1
Manufacturer
IDT
Datasheet

Specifications of 8S89831AKILFT

Rohs
yes
Part # Aliases
ICS8S89831AKILFT
ICS8S89831I Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
ICS8S89831AKI REVISION A APRIL 26, 2010
Symbol
R
PULLUP
Number
15, 16
7, 14
1, 2
3, 4
5, 6
10
11
12
13
8
9
Parameter
Input Pullup Resistor
Q1, nQ1
Q2, nQ2
Q3, nQ3
V
Q0, nQ0
Name
REF_AC
V
nIN
V
EN
V
IN
EE
cc
T
Output
Output
Output
Output
Output
Power
Power
Input
Input
Input
Input
Type
Pullup
Description
Differential output pair. LVPECL/ECL interface levels.
Differential output pair. LVPECL/ECL interface levels.
Differential output pair. LVPECL/ECL interface levels.
Power supply pins.
Synchronizing clock enable. When LOW, Qx outputs will go LOW and nQx outputs will
go HIGH on the next LOW transition at IN input. Input threshold is V
37k
clocked on the falling edge of the input signal IN. LVTTL / LVCMOS interface levels.
Inverting differential LVPECL clock input. RT = 50
Reference voltage for AC-coupled applications.
Termination input. I
Non-inverting LVPECL differential clock input.
RT = 50
Negative supply pin.
Differential output pair. LVPECL/ECL interface levels.
Test Conditions
pull-up resistor. Default state is HIGH when left floating. The internal latch is
termination to V
2
REF_AC
T
(max.) < ±2mA.
.
DIFFERENTIAL LVPECL-TO-LVPECL/ECL FANOUT BUFFER
Minimum
Typical
©2010 Integrated Device Technology, Inc.
termination to V
37
Maximum
CC
T
.
/2. Includes a
Units
k

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