8N3Q001EG-1033CDI IDT, 8N3Q001EG-1033CDI Datasheet - Page 11

• Manufacturer Part Number: 8N3Q001EG-1033CDI
• Description: Programmable Oscillators
• Manufacturer: IDT
• Series: IDT8Nr

Specifications of 8N3Q001EG-1033CDI

• Package / Case: 5 mm x 7 mm x 1.5 mm
• Frequency: 15.476 MHz to 866.67, 975 MHz to 1300 MHz
• Frequency Stability: +/- 50 PPM
• Supply Voltage: 3.63 V
• Load Capacitance: 10 pF
• Termination Style: SMD/SMT
• Output Format: LVPECL
• Minimum Operating Temperature: - 40 C
• Maximum Operating Temperature: + 85 C
• Dimensions: 7 mm W x 5 mm L x 1.5 mm H
• Product: VCXO
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Part # Aliases: IDT8N3Q001EG-1033CDI

IDT8N3Q001 REV G Data Sheet
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
Figure 1A. 3.3V LVPECL Output Termination
IDT8N3Q001GCD REVISION A MARCH 6, 2012
RTT =
((V
3.3V
OH
LVPECL
+ V
OL
) / (V
1
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
* Z
R1
50Ω
o
RTT
R2
50Ω
V
+
_
CC
3.3V
- 2V
Input
11
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 1A and 1B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and clock
component process variations.
Figure 1B. 3.3V LVPECL Output Termination
3.3V
LVPECL
Z
Z
o
o
= 50Ω
= 50Ω
R3
125Ω
QUAD-FREQUENCY PROGRAMMABLE-XO
R1
84Ω
©2012 Integrated Device Technology, Inc.
3.3V
R4
125Ω
R2
84Ω
+
_
3.3V
Input