IS42S16100E-6BLI-TR ISSI, IS42S16100E-6BLI-TR Datasheet - Page 9

• Manufacturer Part Number: IS42S16100E-6BLI-TR
• Description: DRAM 16M 1Mx16 166Mhz SDRAM, 3.3v
• Manufacturer: ISSI

Specifications of IS42S16100E-6BLI-TR

• Rohs: yes
• Data Bus Width: 16 bit
• Organization: 1 Mbit x 16
• Package / Case: BGA-60
• Memory Size: 16 Mbit
• Maximum Clock Frequency: 166 MHz
• Access Time: 6 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V
• Maximum Operating Current: 180 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 1000

IS42S16100E, IS45S16100E
AC CHARACTERISTICS
Symbol Parameter
Notes:
1. When power is first applied, memory operation should be started 100 µs after V
2. measured with t
3. The reference level is 1.4 V when measuring input signal timing. Rise and fall times are measured between V
4. Access time is measured at 1.4V with the load shown in the figure below.
5. The time t
6. Self-Refresh Mode is not supported for A2 grade with T
Integrated Silicon Solution, Inc. — www.issi.com
Rev. E
05/18/2010
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ck
ck
ac
ac
chi
cl
oh
oh
lz
hz
hz
Ds
Dh
as
ah
cks
ckh
cka
cs
ch
rc
ras
rp
rcD
rrD
Dpl
Dpl
Dal
Dal
xsr
t
ref
ref
sequence must be executed before starting memory operation.
output is in the high impedance state.
3
2
3
2
3
2
3
2
3
2
3
2
hz
Clock Cycle Time
Access Time From CLK
CLK HIGH Level Width
CLK LOW Level Width
Output Data Hold Time
Output LOW Impedance Time
Output HIGH Impedance Time
Input Data Setup Time
Input Data Hold Time
Address Setup Time
Address Hold Time
CKE Setup Time
CKE Hold Time
CKE to CLK Recovery Delay Time
Command Setup Time (CS, RAS, CAS, WE, DQM)
Command Hold Time (CS, RAS, CAS, WE, DQM)
Command Period (REF to REF / ACT to ACT)
Command Period (ACT to PRE)
Command Period (PRE to ACT)
Active Command To Read / Write Command Delay Time
Command Period (ACT [0] to ACT[1])
Input Data To Precharge
Command Delay time
Input Data To Active / Refresh
Command Delay time (During Auto-Precharge)
Exit Self-Refresh to Active Time
Transition Time
Refresh Cycle Time (2048) for temperature T
Refresh Cycle Time (2048) for temperature T
(max.) is defined as the time required for the output voltage to transition by ± 200 mV from V
t
= 1 ns. If clock rising time is longer than 1ns, (t
(4)
(1,2,3)
(5)
a
> 85
o
a
a
C.
≤ 85
> 85
t
/2 - 0.5)ns should be added to the parameter.
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
o
o
C
C (A2 only)
DD
6
and V
DDq
2CLK+t
2CLK+t
1CLK+3 —
reach their stipulated voltages. Also note that the power-on
2CLK
2CLK
Min. Max.
2.5
0.3
50
35 100,000
15
15
10
55
—
—
—
—
—
—
5
8
2
2
2
0
2
1
2
1
2
1
2
1
-5
rp
rp
1.2
32
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5
6
5
6
oh
(min.) or V
ih
(min.) and V
2CLK+t
2CLK+t
1CLK+3
2CLK
2CLK
Min.
2.5
2.5
2.0
2.5
0.3
54
36
18
18
12
60
—
—
—
—
—
—
6
8
0
2
1
2
1
2
1
2
1
ol
(max.) when the
rp
rp
-6
il
100,000
(max.).
Max.
5.5
5.5
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
32
—
6
6
2CLK+t
2CLK+t
1CLK+3
2CLK
2CLK
Min.
2.5
2.5
2.0
2.5
0.3
63
42
21
21
14
70
—
—
—
—
—
—
7
8
0
2
1
2
1
2
1
2
1
rp
rp
-7
100,000
Max.
5.5
5.5
1.2
—
—
—
32
16
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
6
Units
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9