dsPIC33FJ09GS302-I/MM Microchip Technology, dsPIC33FJ09GS302-I/MM Datasheet - Page 4
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dsPIC33FJ09GS302-I/MM
Manufacturer Part Number
dsPIC33FJ09GS302-I/MM
Description
Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
Manufacturer
Microchip Technology
Datasheet
1.DSPIC33FJ09GS302-ISP.pdf
(52 pages)
Specifications of dsPIC33FJ09GS302-I/MM
Rohs
yes
Core
dsPIC33F
Data Bus Width
16 bit
Program Memory Size
9 KB
Data Ram Size
1 KB
Device Million Instructions Per Second
40 MIPs
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Package / Case
QFN-28
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
2.4
2.4.1
The dsPIC33F devices have Configuration bits stored
in the last locations of implemented program memory.
These bits can be set or cleared to select various
device configurations. There are two types of
Configuration
code-protect bits. The system operation bits determine
the power-on settings for system level components,
such as the Oscillator and the Watchdog Timer. The
code-protect bits prevent program memory from being
read and written.
TABLE 2-3:
TABLE 2-4:
DS70659B-page 4
CONFIG2 002BFC 23:16
CONFIG1 002BFE 23:16
Legend:
Note 1:
File Name
FICD
Reserved
FWDT
FOSC
FOSCSEL
FGS
Reserved
Reserved
Legend:
Note 1:
File Name
2:
3:
4:
2:
3:
4:
Configuration Bits
— = unimplemented, read as ‘1’.
During a Power-on Reset (POR), the contents of these Flash locations are transferred to the Configuration Shadow
registers.
This bit is reserved on dsPIC33FJ16GP101/102 devices and reads as ‘1’.
This bit is reserved; program as ‘0’.
This bit is reserved for use by development tools and must be programmed as ‘1’.
000FFA
000FFC
0017FC
000FFE
0017FE
— = unimplemented, read as ‘1’.
This address applies to dsPIC33FJ06GS001 and dsPIC33FJ06GSX0XA Configuration bits.
This address applies to dsPIC33FJ09GS302 Configuration bits.
This bit is reserved for use by development tools and must be programmed as ‘1’.
This bit is reserved; program as ‘0’.
000FF0
0017F0
000FF2
0017F2
000FF4
0017F4
000FF6
0017F6
000FF8
001F78
0017FA
OVERVIEW
Addr.
Addr.
bits:
dsPIC33FJ16GP/MC10X CONFIGURATION BITS
dsPIC33FJ06GS001, dsPIC33FJ06GSX0XA, AND dsPIC33FJ09GS302
CONFIGURATION BITS
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(2)
(1)
(1)
(2)
(1)
(2)
Range
15:8
15:8
Bit
7:0
7:0
Reserved
system
FWDTEN
IESO
Bit 7
—
—
—
—
Reserved
Bit 23/15/7
FCKSM<1:0>
FWDTEN
IESO
(3)
—
—
operation
FCKSM<1:0>
(3)
Bit 6
PWMLOCK
—
—
—
—
—
—
—
Reserved
Bit 22/14/6
WINDIS
—
—
bits,
IOL1WAY
PLLKEN
(3)
(2)
Bit 5
and
—
—
—
—
—
—
OSCIOFNC IOL1WAY
PWMPIN
Bit 21/13/5 Bit 20/12/4 Bit 19/11/3 Bit 18/10/2 Bit 17/9/1 Bit 16/8/0
PLLKEN
GCP
—
—
Reserved
WDTPRE
(2)
Bit 4
—
—
—
—
—
—
Table 2-3
Configuration
devices.
Table 2-4
Configuration
dsPIC33FJ06GSX0XA,
devices.
WDTPRE
GWRP
(4)
—
WDTWIN<1:0>
—
Bit 3
lists the address and locations of the
lists the address and location of the
Reserved
—
—
—
—
—
—
—
LPOL
—
—
bits
bits
(2)
OSCIOFNC
(4)
WDTPOST<3:0>
for
Bit 2
© 2011 Microchip Technology Inc.
—
—
—
—
—
ALTI2C1
HPOL
WDTPOST<3:0>
for
and
—
—
dsPIC33FJ16GP/MC10X
(2)
FNOSC<2:0>
FNOSC<2:0>
dsPIC33FJ06GS001,
dsPIC33FJ09GS302
Bit 1
GCP
POSCMD<1:0>
—
—
—
POSCMD<1:0>
—
—
ICS<1:0>
ICS<1:0>
GWRP
Bit 0
—
—
—
—
—