MAX1177AEUP+T Maxim Integrated, MAX1177AEUP+T Datasheet - Page 8
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MAX1177AEUP+T
Manufacturer Part Number
MAX1177AEUP+T
Description
Analog to Digital Converters - ADC 16-Bit 135ksps 4.2V Precision ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX1177AEUP.pdf
(13 pages)
Specifications of MAX1177AEUP+T
Rohs
yes
Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
91 dB
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
16-Bit, 135ksps, Single-Supply ADC
with to 10V Input Range
Select standby mode or shutdown mode with the R/C
bit during the second falling edge of CS (see the
Selecting Standby or Shutdown Mode section). The
MAX1177 automatically enters either standby mode
(reference and buffer on) or shutdown (reference and
buffer off) after each conversion, depending on the sta-
tus of R/C during the second falling edge of CS.
The MAX1177 generates an internal conversion clock to
free the µP from the burden of running the SAR conver-
sion clock. Total conversion time (t
hold mode (second falling edge of CS) to end-of-con-
version (EOC) falling is 4.7µs (max).
CS and R/C control acquisition and conversion in the
MAX1177 (Figure 2). The first falling edge of CS powers
up the device and puts it in acquire mode if R/C is low.
The convert start is ignored if R/C is high. The device
needs at least 12ms for the internal reference to wake
up and settle before starting the conversion (C
= 0.1µF, C
The MAX1177 has a selectable standby or low-power
shutdown mode. In standby mode, the ADC’s internal
reference and reference buffer do not power down
between conversions, eliminating the need to wait for
the reference to power up before performing the next
conversion. Shutdown mode powers down the refer-
ence and reference buffer after completing a conver-
sion. The reference and reference buffer require a
minimum of 12ms to power up and settle from shut-
down (C
The state of R/C at the second falling edge of CS
selects which power-down mode the MAX1177 enters
upon conversion completion. Holding R/C low causes
the device to enter standby mode. The reference and
buffer are left on after the conversion completes. R/C
high causes the MAX1177 to enter shutdown mode and
power-down the reference and buffer after conversion
(Figures 5 and 6). Set the voltage at R/C high during
the second falling edge of CS to realize the lowest cur-
rent operation.
8
_______________________________________________________________________________________
Selecting Standby or Shutdown Mode
REFADJ
REF
= 10µF), if powering up from shutdown.
Applications Information
= 0.1µF, C
REF
Starting a Conversion
Power-Down Modes
= 10µF).
CONV
Internal Clock
) after entering
REFADJ
Figure 3. Typical Operating Circuit for the MAX1177
Figure 4. Equivalent Input Circuit
AIN
ANALOG INPUT
LOW
BYTE
S1, S2 = T/H SWITCH
R2 = 3.92kΩ
R3 = 17.79kΩ
MAX1177
HIGH
BYTE
3.92kΩ
R2
0.1µF
R3
17.79kΩ
161Ω
AIN
R/C
CS
HBEN
+5V ANALOG
AV
DD
MAX1177
R1
3.4kΩ
AGND DGND
TRACK
+5V DIGITAL
DV
HOLD
D8–D15
REFADJ
S1
DD
D0–D7
EOC
REF
OR
C
30pF
TRACK
HOLD
0.1µF
µP DATA
BUS
0.1µF
S2
HOLD
T/H OUT
10µF