LCMXO256E-3M100I Lattice, LCMXO256E-3M100I Datasheet - Page 11

• Manufacturer Part Number: LCMXO256E-3M100I
• Description: CPLD - Complex Programmable Logic Devices 256 LUTs 78 IO 1.2V -3 Spd I
• Manufacturer: Lattice

Specifications of LCMXO256E-3M100I

• Memory Type: SRAM
• Number Of Macrocells: 128
• Maximum Operating Frequency: 500 MHz
• Delay Time: 4.9 ns
• Number Of Programmable I/os: 78
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Package / Case: CSBGA-100
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 1800
• Supply Current: 10 mA
• Supply Voltage - Max: 1.26 V
• Supply Voltage - Min: 1.14 V

Lattice Semiconductor
Figure 2-8. Primary Clocks for MachXO1200 and MachXO2280 Devices
Four secondary clocks are generated from four 16:1 muxes as shown in Figure 2-9. Four of the secondary clock
sources come from dual function clock pins and 12 come from internal routing.
Figure 2-9. Secondary Clocks for MachXO Devices
Routing
Routing
12
Up to 9
Clock
Pads
Clock
Pads
4
4
Outputs
PLL
Up to 6
2-8
16:1
16:1
16:1
16:1
16:1
16:1
16:1
16:1
Primary Clock 0
Primary Clock 1
Primary Clock 2
Primary Clock 3
Secondary (Control)
Clocks
MachXO Family Data Sheet
Architecture