dsPIC33FJ09GS302-E/SP Microchip Technology, dsPIC33FJ09GS302-E/SP Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
dsPIC33FJ09GS302-E/SP
Manufacturer Part Number
dsPIC33FJ09GS302-E/SP
Description
Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
Manufacturer
Microchip Technology
Datasheet
1.DSPIC33FJ09GS302-ISP.pdf
(52 pages)
Specifications of dsPIC33FJ09GS302-E/SP
Rohs
yes
Core
dsPIC33F
Data Bus Width
16 bit
Program Memory Size
9 KB
Data Ram Size
1 KB
Device Million Instructions Per Second
40 MIPs
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Package / Case
PDIP-28
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Product
DSCs
REGISTER 3-1:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-0
Note 1:
R/SO-0
dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
WR
U-0
—
2:
3:
(1)
These bits can only be reset on a Power-on Reset (POR).
All other combinations of NVMOP<3:0> are unimplemented.
This command will erase either all of program memory or all of executive memory, but not both.
WR: Write Control bit
1 = Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
0 = Program or erase operation is complete and inactive
WREN: Write Enable bit
1 = Enable Flash program/erase operations
0 = Inhibit Flash program/erase operations
WRERR: Write Sequence Error Flag bit
1 = An improper program or erase sequence attempt or termination has occurred (bit is set
0 = The program or erase operation completed normally
Unimplemented: Read as ‘0’
ERASE: Erase/Program Enable bit
1 = Perform the erase operation specified by NVMOP<3:0> on the next WR command
0 = Perform the program operation specified by NVMOP<3:0> on the next WR command
Unimplemented: Read as ‘0’
NVMOP<3:0>: NVM Operation Select bits
If ERASE = 1:
1111 = Memory bulk erase
1101 = Erase General Segment
0010 = Program Memory page erase
If ERASE = 0:
0011 = Memory word program
R/W-0
R/W-0
ERASE
WREN
cleared by hardware once operation is complete
automatically on any set attempt of the WR bit)
NVMCON: FLASH MEMORY CONTROL REGISTER
(1)
(1)
SO = Satiable only bit
W = Writable bit
‘1’ = Bit is set
R/W-0
WRERR
U-0
—
(1)
(3)
U-0
U-0
—
—
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
(1)
R/W-0
U-0
—
NVMOP<3:0>
(1)
x = Bit is unknown
R/W-0
U-0
—
(1)
DS70659B-page 11
R/W-0
U-0
—
(1)
bit 8
bit 0