M4A3-256/128-55FAC Lattice, M4A3-256/128-55FAC Datasheet - Page 11
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M4A3-256/128-55FAC
Manufacturer Part Number
M4A3-256/128-55FAC
Description
CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
Manufacturer
Lattice
Datasheet
1.M4A5-19296-10VNI.pdf
(62 pages)
Specifications of M4A3-256/128-55FAC
Memory Type
EEPROM
Number Of Macrocells
256
Maximum Operating Frequency
167 MHz
Delay Time
5 ns
Number Of Programmable I/os
97
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA-256-97
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
20
Factory Pack Quantity
450
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M4A3-256/128-55FAC
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
The flip-flop can be configured as a D-type or T-type latch. J-K or S-R registers can be synthesized. The
primary flip-flop configurations are shown in Figure 6, although others are possible. Flip-flop functionality
is defined in Table 8. Note that a J-K latch is inadvisable as it will cause oscillation if both J and K inputs
are HIGH.
e. T-type with programmable T polarity
c. Latch with XOR
a. D-type with XOR
L
T
G
D
AP AR
AP AR
AP AR
Figure 6. Primary Macrocell Configurations
g. Combinatorial with programmable polarity
Q
Q
Q
ispMACH 4A Family
b. D-type with programmable D polarity
d. Latch with programmable D polarity
f. Combinatorial with XOR
D
L
G
AP AR
AP AR
Q
Q
17466G-011
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