MAX1158AEUP+T Maxim Integrated, MAX1158AEUP+T Datasheet - Page 7

• Manufacturer Part Number: MAX1158AEUP+T
• Description: Analog to Digital Converters - ADC 14-Bit 135ksps 4.2V Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1158AEUP+T

• Rohs: yes
• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 135 KSPs
• Resolution: 14 bit
• Input Type: Single-Ended
• Snr: 85 dB
• Interface Type: Parallel
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 879 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: Internal, External

Figure 1. Load Circuits
The MAX1156/MAX1158/MAX1174 use a successive-
approximation (SAR) conversion technique with an
inherent track-and-hold (T/H) stage to convert an ana-
log input into a 14-bit digital output. Parallel outputs
provide a high-speed interface to microprocessors
(µPs). The Functional Diagram shows a simplified inter-
nal architecture of the MAX1156/MAX1158/MAX1174.
Figure 3 shows a typical application circuit for the
MAX1156/MAX1158/MAX1174.
DO–D13
1mA
PIN
13
14
15
16
17
18
19
20
a) HIGH-Z TO V
DGND
V
V
OL
OH
TO V
TO HIGH-Z
14-Bit, 135ksps, Single-Supply ADCs with
D2/D10
D3/D11
NAME
DGND
D0/D8
D1/D9
HBEN
DV
OH
_______________________________________________________________________________________
CS
, AND
DD
OH
C
,
LOAD
Detailed Description
= 20pF
High-Byte Enable Input. Used to multiplex the 14-bit conversion result.
1: Most significant byte available on the data bus.
0: Least significant byte available on the data bus.
Convert Start. The first falling edge of CS powers up the device and enables acquire mode when R/C
is low. The second falling edge of CS starts conversion. The third falling edge of CS loads the result
onto the bus when R/C is high.
Digital Ground
Digital Supply Voltage. Bypass with a 0.1µF capacitor to DGND.
Three-State Digital Data Output. D0 is the LSB.
Three-State Digital Data Output
Three-State Digital Data Output
Three-State Digital Data Output
Converter Operation
b) HIGH-Z TO V
DO–D13
V
V
OH
OL
TO HIGH-Z
TO V
1mA
OL
DV
, AND
OL
DD
,
C
DGND
LOAD
= 20pF
Bipolar Analog Input Range
The MAX1156/MAX1158/MAX1174 have an input
scaler, which allows conversion of true bipolar input
voltages and input voltages greater than the power
supply, while operating from a single +5V analog sup-
ply. The input scaler attenuates and shifts the analog
input to match the input range of the internal DAC. The
MAX1156 has a unipolar input voltage range of 0 to
+10V. The MAX1158 input voltage range is ±10V while
the MAX1174 input voltage range is ±5V. Figure 4
shows the equivalent input circuit of the MAX1156/
MAX1158/MAX1174. This circuit limits the current going
into or out of AIN to less than 1.8mA.
In track mode, the internal hold capacitor acquires the
analog signal (see Figure 4). In hold mode, the T/H
switches open and the capacitive DAC samples the
analog input. During the acquisition, the analog input
(AIN) charges capacitor C
on the second falling edge of CS. At this instant, the
T/H switches open. The retained charge on C
resents a sample of the input. In hold mode, the capac-
itive DAC adjusts during the remainder of the
conversion time to restore node T/H OUT to zero within
the limits of 14-bit resolution. Force CS low to put valid
data on the bus after conversion is complete.
FUNCTION
Pin Description (continued)
HOLD
. The acquisition ends
Track and Hold (T/H)
Analog Input
Input Scaler
HOLD
rep-
7