M4A3-32/32-7JNC Lattice, M4A3-32/32-7JNC Datasheet - Page 34

• Manufacturer Part Number: M4A3-32/32-7JNC
• Description: CPLD - Complex Programmable Logic Devices Use ispMACH 4000V
• Manufacturer: Lattice

Specifications of M4A3-32/32-7JNC

• Rohs: yes
• Memory Type: EEPROM
• Number Of Macrocells: 32
• Maximum Operating Frequency: 182 MHz
• Delay Time: 7.5 ns
• Number Of Programmable I/os: 32
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: PLCC-44
• Mounting Style: SMD/SMT
• Number Of Product Terms Per Macro: 20
• Factory Pack Quantity: 780
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

BLOCK DIAGRAM – M4A3-384/160, M4A3-384/192
34
Detail A
Block C
Block F
Block G
Block J
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
Matrix
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
72 X 90
Matrix
72 X 90
Block K
Block B
72 X 90
72 X 90
16
16
16
16
8
8
8
8
8
36
8
36
36
16
16
8
36
16
16
8
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
Block D
Block E
Block H
Block I
16
16
16
16
24
24
24
24
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
Output Switch
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
Matrix
72 X 90
Matrix
72 X 90
Block A
72 X 90
72 X 90
Block L
16
16
16
16
8
8
8
8
8
36
36
16
16
8
8
36
36
16
16
8
ispMACH 4A Family
8
8
8
8
4
4
4
4
4
4
4
4
4
4
4
4
Repeat Detail A
4
CLK0–CLK3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
Block HX
I/O Cells
Macrocells
I/O Cells
Macrocells
72 X 90
72 X 90
Macrocells
I/O Cells
72 X 90
72 X 90
Macrocells
I/O Cells
Block M
16
16
36
36
16
16
16
16
36
36
16
16
Matrix
Matrix
8
8
8
8
Matrix
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
Block EX
Block DX
Block AX
Block P
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
Block GX
I/O Cells
Macrocells
I/O Cells
I/O Cells
Macrocells
I/O Cells
Macrocells
72 X 90
72 X 90
Macrocells
72 X 90
72 X 90
Block N
16
16
36
36
16
16
16
16
36
36
16
16
Matrix
8
Matrix
8
8
Matrix
8
Matrix
8
8
8
8
16
16
16
16
24
24
24
24
16
16
16
16
Block FX
Block CX
Block BX
Block O
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