MAX19538ETL+ Maxim Integrated, MAX19538ETL+ Datasheet - Page 5

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MAX19538ETL+

Manufacturer Part Number
MAX19538ETL+
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX19538ETL+

Number Of Channels
1
Architecture
Pipeline
Conversion Rate
95 MSPs
Resolution
12 bit
Input Type
Differential
Snr
70.9 dB
Interface Type
Parallel
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFN EP
Maximum Power Dissipation
538 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
Internal, External
Maxim Integrated
______________________________________________________________Pin Description
MAX705/MAX706
DIP/SO
1
2
3
4
5
6
7
8
µMAX
3
4
5
6
7
8
1
2
MAX707/MAX708
DIP/SO
1
2
3
4
5
6
7
8
PIN
µMAX
3
4
5
6
7
1
2
Low-Cost, µP Supervisory Circuits
DIP/SO
1
2
3
4
5
6
8
7
MAX813L
µMAX
MAX705–MAX708/MAX813L
3
4
5
6
7
8
2
1
RESET
RESET
NAME
WDO
GND
PFO
N.C.
WDI
V
MR
PFI
CC
Manual-Reset Input triggers a reset pulse when
pulled below 0.8V. This active-low input has an inter-
nal 250µA pull-up current. It can be driven from a TTL
or CMOS logic line as well as shorted to ground with
a switch.
+5V Supply Input
0V Ground Reference for all signals
Power-Fail Voltage Monitor Input. When PFI is less
than 1.25V, PFO goes low. Connect PFI to GND or
V
Power-Fail Output goes low and sinks current when
PFI is less than 1.25V; otherwise PFO stays high.
Watchdog Input. If WDI remains high or low for
1.6sec, the internal watchdog timer runs out and
WDO goes low (Figure 1). Floating WDI or connect-
ing WDI to a high-impedance three-state buffer dis-
ables the watchdog feature. The internal watchdog
timer clears whenever reset is asserted, WDI is three-
stated, or WDI sees a rising or falling edge.
No Connect
Active-Low Reset Output pulses low for 200ms when
triggered, and stays low whenever V
reset threshold (4.65V in the MAX705 and 4.40V in the
MAX706). It remains low for 200ms after V
above the reset threshold or MR goes from low to high
(Figure 3). A watchdog timeout will not trigger RESET
unless WDO is connected to MR.
Watchdog Output pulls low when the internal watch-
dog timer finishes its 1.6sec count and does not go
high again until the watchdog is cleared. WDO also
goes low during low-line conditions. Whenever V
below the reset threshold, WDO stays low; however,
unlike RESET, WDO does not have a minimum pulse
width. As soon as V
old, WDO goes high with no delay.
Active-High Reset Output is the inverse of RESET.
Whenever RESET is high, RESET is low, and vice
versa (Figure 2). The MAX813L has a RESET output
only.
CC
when not used.
CC
FUNCTION
rises above the reset thresh-
CC
is below the
CC
rises
CC
is
5

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