MM912H634DV1AER2 Freescale Semiconductor, MM912H634DV1AER2 Datasheet - Page 249

• Manufacturer Part Number: MM912H634DV1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DV1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
Table 325. CRGMULT Field Descriptions
4.32.3.2.4
This register provides 9S12I32PIMV1 status bits and flags.
Table 326. 9S12I32PIMV1 Flags Register (CRGFLG)
Read: Anytime
Write: Refer to each bit for individual write conditions
Table 327. CRGFLG Field Descriptions
Freescale Semiconductor
Note:
183.
184.
6, 5, 4, 3, 2, 1,
0x0037
Reset
MULT[6:0]
LOCKST
LOCKIF
UPOSC
W
R
PORF
Field
Field
ILAF
0
6
4
3
2
1
PORF is set to 1 when a Power-On Reset occurs. Unaffected by System Reset.
ILAF is set to 1 when an illegal address access occurs. Unaffected by System Reset. Cleared by Power-On Reset.
FLL Multiplier Bits
DCO Clock will lock to RDIV Clock multiplied by (1000 + 2*MULT[6:0]. Depending on the REFS bit, RDIV Clock is either the
Internal Reference Clock or the divided down Oscillator Clock. So multiplication factors can be from 1000 to 1254. MULT[6:0]
bits must be chosen so that the minimum and maximum DCO Clock frequency f
Characteristics
Power-on Reset Flag — PORF is set to 1 when a power on reset occurs. This flag can only be cleared by writing a 1. Writing
a 0 has no effect.
0 Power-on Reset has not occurred.
1 Power-on Reset has occurred.
FLL Lock Interrupt Flag — LOCKIF is set to 1 when LOCKST status bit changes. This flag can only be cleared by writing a
1. Writing a 0 has no effect. If enabled (LOCKIE = 1), LOCKIF causes an interrupt request. Entering Stop mode or writing
registers CRGCTL0, CRGMULT, CRGTRIMH, or CRGTRIML while LOCKST = 1, clears the LOCKST bit, but does not set the
LOCKIF bit.
0 No change in LOCKST bit.
1 LOCKST bit has changed.
Lock Status Bit — LOCKST reflects the current state of FLL lock condition. Writes have no effect. Entering stop mode or writing
registers CRGCTL0, CRGMULT, CRGTRIMH, or CRGTRIML clears the LOCKST bit.
0 DCO Clock is not within the desired tolerance of the target frequency.
1 DCO Clock is within the desired tolerance of the target frequency.
Illegal Address Reset Flag — ILAF is set to 1 when an illegal address access occurs. Refer to MMC Block Guide for details.
This flag can only be cleared by writing a 1. Writing a 0 has no effect.
0 Illegal address access has not occurred.
1 Illegal address access has occurred.
Oscillator Startup Status Bit — UPOSC is set when startup of the oscillator has finished successfully.
The oscillator requires a startup time t
be selected as Bus Clock source (BCLKS bit) or FLL Reference Clock (REFS bit) if UPOSC = 1. If despite enabling the
Oscillator (OSCEN = 1), the UPOSC flag is not set within t
Monitor becomes active after initial oscillator startup, that is only for UPOSC=1.
UPOSC is cleared with disabling the Oscillator, that is either OSCEN = 0 or entering Stop mode. Writes have no effect.
0 Oscillator has not started up. Oscillator Monitor is inactive.
1 Oscillator has started up. Oscillator Monitor is active.
0
0
7
9S12I32PIMV1 Flags Register (CRGFLG)
for frequency range of f
PORF
(183)
6
5
0
0
UPOSC
DCO
.
. See
LOCKIF
Electrical Characteristics
0
4
Description
Description
UPOSC
LOCKST
, this indicates e.g. a crystal failure. Note that the Oscillator
S12S Clocks and Reset Generator (S12SCRGV1)
0
3
for a value. Note that the Oscillator Clock can only
DCO
ILAF
(184)
is not violated. See
2
UPOSC
1
0
Electrical
MM912F634
0
0
0
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