MAX199BCWI-T Maxim Integrated, MAX199BCWI-T Datasheet - Page 4

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MAX199BCWI-T

Manufacturer Part Number
MAX199BCWI-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX199BCWI-T

Number Of Channels
8
Architecture
SAR
Conversion Rate
100 KSPs
Resolution
12 bit
Input Type
Single-Ended
Snr
Yes
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
SOIC-28 Wide
Maximum Power Dissipation
762 mW
Minimum Operating Temperature
0 C
Number Of Converters
1
Voltage Reference
4.096 V
Multi-Range (±4V, ±2V, +4V, +2V),
+5V Supply, 12-Bit DAS with 8+4 Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
with 50% duty cycle; T
4
Supply Voltage
POWER REQUIREMENTS
Supply Current
Power-Supply Rejection Ratio
(Note 8)
TIMING
Internal Clock Frequency
External Clock Frequency Range
Acquisition Time
Conversion Time
Throughput Rate
Bandgap Reference
Start-Up Time
Reference Buffer Settling
DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS, HBEN, SHDN) (Note 11)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS (D7–D4, D3/D11, D2/D10, D1/D9, D0/D8, INT)
Output Low Voltage
Output High Voltage
Three-State Output Capacitance
DD
_______________________________________________________________________________________
= 5V ±5%; unipolar/bipolar range; external reference mode, V
PARAMETER
A
= T
MIN
to T
SYMBOL
MAX
t
t
PSRR
C
t
CONV
ACQE
V
V
f
f
ACQI
V
V
V
I
C
CLK
CLK
I
DD
OUT
INH
DD
INL
IN
OH
OL
, unless otherwise noted.)
IN
To 0.1mV, REF
bypass capacitor
fully discharged
Normal mode, bipolar ranges
Normal mode, unipolar ranges
Standby power-down (STBYPD)
Full power-down mode (FULLPD) (Note 7)
External reference = 4.096V
Internal reference
C
Internal acquisition
External acquisition (Note 9)
After FULLPD or STBYPD
External CLK
Internal CLK, C
External CLK
Internal CLK, C
Power-up (Note 10)
V
(Note 5)
V
V
(Note 5)
IN
DD
DD
CLK
= 0V or V
= 4.75V, I
= 4.75V, I
= 100pF
DD
SINK
SOURCE
CLK
CLK
CONDITIONS
= 1.6mA
= 100pF
= 100pF
REF
= 1mA
External CLK
Internal CLK
C
C
= 4.096V; 4.7µF at REF pin; external clock, f
REF
REF
= 4.7µF
= 33µF
V
DD
4.75
1.25
MIN
0.1
3.0
3.0
3.0
6.0
6.0
2.4
62
- 1
TYP
1.56
±
700
200
7.7
60
60
6
1
5
8
/
2
MAX
5.25
±
2.00
10.0
±10
850
120
100
2.0
5.0
0.8
0.4
18
10
15
15
1
CLK
/
2
= 2.0MHz
UNITS
ksps
MHz
MHz
LSB
mA
ms
µA
µA
µs
µs
µs
pF
pF
V
V
V
V
V

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