MAX1168BCEG-T Maxim Integrated, MAX1168BCEG-T Datasheet - Page 28

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MAX1168BCEG-T

Manufacturer Part Number
MAX1168BCEG-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1168BCEG-T

Number Of Channels
8
Architecture
SAR
Conversion Rate
200 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
88.5 dB
Interface Type
QSPI, Serial (SPI, Microwire)
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Power Dissipation
762 mW
Number Of Converters
1
Voltage Reference
4.096 V
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the ENOB as follows:
Figure 24 shows the ENOB as a function of the
MAX1167/MAX1168s’ input frequency.
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V
V
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next-largest fre-
quency component.
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
28
5
are the 2nd- through 5th-order harmonics.
______________________________________________________________________________________
T
1
HD
is the fundamental amplitude and V
ENOB = (SINAD - 1.76) / 6.02
=
20 log
Spurious-Free Dynamic Range
×
Total Harmonic Distortion
Effective Number of Bits
(
V
2
2
+
V
3
2
V
+
1
V
4
2
+
V
5
2
)
2
through
Use printed circuit (PC) boards with separate analog
and digital ground planes. Do not use wire-wrap
boards. Connect the two ground planes together at the
MAX1167/MAX1168 AGND terminal. Isolate the digital
supply from the analog with a low-value resistor (10Ω)
or ferrite bead when the analog and digital supplies
come from the same source (Figure 25).
Constraints on sequencing the power supplies and
inputs are as follows:
• Apply AGND before DGND.
• Apply AIN_ and REF after AV
• DV
Ensure that digital return currents do not pass through
the analog ground and that return-current paths are low
impedance. A 5mA current flowing through a PC board
ground trace impedance of only 0.05Ω creates an error
voltage of about 250µV and a 4 LSB error with a +4.096V
full-scale system.
The board layout should ensure that digital and analog
signal lines are kept separate. Do not run analog and dig-
ital lines (especially the SCLK and DOUT) parallel to one
another. If one must cross another, do so at right angles.
The ADC’s high-speed comparator is sensitive to high-
frequency noise on the AV
excessively noisy supply to the analog ground plane
with a 0.1µF capacitor in parallel with a 1µF to 10µF
low-ESR capacitor. Keep capacitor leads short for best
supply-noise rejection.
present.
DD
is independent of the supply sequencing.
Supplies, Layout, Grounding, and
DD
power supply. Bypass an
DD
and AGND are
Bypassing

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