MAX1246BEPE Maxim Integrated, MAX1246BEPE Datasheet - Page 18
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MAX1246BEPE
Manufacturer Part Number
MAX1246BEPE
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet
1.MAX1247BEEE-T.pdf
(25 pages)
Specifications of MAX1246BEPE
Number Of Channels
4/2
Architecture
SAR
Conversion Rate
133 KSPs
Resolution
12 bit
Input Type
Single-Ended/Differential
Snr
70 dB
Interface Type
4-Wire (SPI, Microwire, QSPI, TMS320)
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
PDIP N
Maximum Power Dissipation
667 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
2.5 V
+2.7V, Low-Power, 4-Channel,
Serial 12-Bit ADCs in QSOP-16
The MAX1246/MAX1247 auto power-down modes can
save considerable power when operating at less than
maximum sample rates. Figures 12, 13a, and 13b show
the average supply current as a function of the sam-
pling rate. The following discussion illustrates the vari-
ous power-down sequences.
The following examples show two different power-down
sequences. Other combinations of clock rates, compen-
sation modes, and power-down modes may give lowest
power consumption in other applications.
Figure 12. Average Supply Current vs. Conversion Rate with
External Reference
Figure 13b. MAX1246 Supply Current vs. Conversion Rate,
FASTPD
18
______________________________________________________________________________________
10,000
10,000
1000
1000
100
100
0.1
10
10
1
1
0.1
0.1
V REF = V
R
CODE = 101010100000
R
CODE = 101010100000
LOAD
LOAD
WITH EXTERNAL REFERENCE
1
AVERAGE SUPPLY CURRENT
1
AVERAGE SUPPLY CURRENT
= ∞
= ∞
vs. CONVERSION RATE
vs. CONVERSION RATE
4 CHANNELS
DD
10
CONVERSION RATE (Hz)
CONVERSION RATE (Hz)
Power-Down Sequencing
10
= 3.0V
Conversions/Channel/Second
(USING FASTPD)
100
100
Lowest Power at up to 500
4 CHANNELS
1k
1k
1 CHANNEL
10k
10k
1 CHANNEL
100k
100k
1M
1M
Figure 13a depicts the MAX1246 power consumption
for one or four channel conversions utilizing full power-
down mode and internal-reference compensation. A
0.047µF bypass capacitor at REFADJ forms an RC filter
with the internal 20kΩ reference resistor with a 0.9ms
time constant. To achieve full 12-bit accuracy, 10 time
constants or 9ms are required after power-up. Waiting
this 9ms in FASTPD mode instead of in full power-up
can reduce power consumption by a factor of 10 or
more. This is achieved by using the sequence shown in
Figure 14.
Figure 13a. MAX1246 Supply Current vs. Conversion Rate,
FULLPD
Figure 13c. Typical Reference-Buffer Power-Up Delay vs. Time
in Shutdown
100
1.0
0.0
2.0
1.5
0.5
10
1
0.001
TYPICAL REFERENCE-BUFFER POWER-UP
0.01
R
CODE = 101010100000
LOAD
DELAY vs. TIME IN SHUTDOWN
AVERAGE SUPPLY CURRENT
0.1
= ∞
vs. CONVERSION RATE
0.01
TIME IN SHUTDOWN (sec)
CONVERSION RATE (Hz)
(USING FULLPD)
1
4 CHANNELS
0.1
10
1 CHANNEL
1
100
1k
10