S9S12GN32F0VLC Freescale Semiconductor, S9S12GN32F0VLC Datasheet - Page 378

no-image

S9S12GN32F0VLC

Manufacturer Part Number
S9S12GN32F0VLC
Description
16-bit Microcontrollers - MCU 16-bit32k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12GN32F0VLC

Product Category
16-bit Microcontrollers - MCU
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
32 KB
Data Ram Size
2048 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
S12 Clock, Reset and Power Management Unit (S12CPMU)
380
RTIOSCSEL
OSCSEL0
Field
COP
1
0
RTI Clock Select — RTIOSCSEL selects the clock source to the RTI. Either IRCCLK or OSCCLK. Changing the
RTIOSCSEL bit re-starts the RTI time-out period.
RTIOSCSEL can only be set to 1, if UPOSC=1.
UPOSC= 0 clears the RTIOSCSEL bit.
0 RTI clock source is IRCCLK.
1 RTI clock source is OSCCLK.
COP Clock Select 0 — COPOSCSEL0 and COPOSCSEL1 combined determine the clock source to the COP
(see also
If COPOSCSEL1 = 1, COPOSCSEL0 has no effect regarding clock select and changing the COPOSCSEL0 bit
does not re-start the COP time-out period.
When COPOSCSEL1=0,COPOSCSEL0 selects the clock source to the COP to be either IRCCLK or OSCCLK.
Changing the COPOSCSEL0 bit re-starts the COP time-out period.
COPOSCSEL0 can only be set to 1, if UPOSC=1.
UPOSC= 0 clears the COPOSCSEL0 bit.
0 COP clock source is IRCCLK.
1 COP clock source is OSCCLK
Table 10-6. COPOSCSEL1, COPOSCSEL0 clock source select description
Table
COPOSCSEL1
10-6)
0
0
1
Table 10-5. CPMUCLKS Descriptions (continued)
MC9S12G Family Reference Manual,
COPOSCSEL0
0
1
x
Description
Rev.1.23
COP clock source
OSCCLK
IRCCLK
ACLK
Freescale Semiconductor

Related parts for S9S12GN32F0VLC