MK20DX128VLF5 Freescale Semiconductor, MK20DX128VLF5 Datasheet

no-image

MK20DX128VLF5

Manufacturer Part Number
MK20DX128VLF5
Description
ARM Microcontrollers - MCU KINETIS 128K FLEX
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK20DX128VLF5

Core
ARM Cortex M4
Processor Series
K20
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK20DX128VLF5
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Data Sheet: Technical Data
K20 Sub-Family
Supports the following:
MK20DN32VLF5, MK20DX32VLF5,
MK20DN64VLF5, MK20DX64VLF5,
MK20DN128VLF5, MK20DX128VLF5,
MK20DN32VFT5, MK20DX32VFT5,
MK20DN64VFT5, MK20DX64VFT5,
MK20DN128VFT5, MK20DX128VFT5
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2011–2012 Freescale Semiconductor, Inc.
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 50 MHz ARM Cortex-M4 core with DSP
– Up to 128 KB program flash.
– Up to 32 KB FlexNVM on FlexMemory devices
– 2 KB FlexRAM on FlexMemory devices
– Up to 16 KB RAM
– Serial programming interface (EzPort)
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– Multiple low-power modes to provide power
– 4-channel DMA controller, supporting up to 41
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
optimization based on application requirements
request sources
• Security and integrity modules
• Analog modules
• Timers
• Communication interfaces
– Hardware CRC module to support fast cyclic
– 128-bit unique identification (ID) number per chip
– 16-bit SAR ADC
– Two analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two-channel quadrature decoder/general purpose
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
– USB full-/low-speed On-the-Go controller with on-
– SPI module
– I2C module
– Three UART modules
– I2S module
redundancy checks
DAC and programmable reference input
timer
timer
chip transceiver
K20P48M50SF0
Document Number: K20P48M50SF0
Rev. 4 5/2012

Related parts for MK20DX128VLF5

MK20DX128VLF5 Summary of contents

Page 1

... Freescale Semiconductor Data Sheet: Technical Data K20 Sub-Family Supports the following: MK20DN32VLF5, MK20DX32VLF5, MK20DN64VLF5, MK20DX64VLF5, MK20DN128VLF5, MK20DX128VLF5, MK20DN32VFT5, MK20DX32VFT5, MK20DN64VFT5, MK20DX64VFT5, MK20DN128VFT5, MK20DX128VFT5 Features • Operating Characteristics – Voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40 to 105°C • ...

Page 2

... DSPI switching specifications (full voltage range).47 6.8.6 I2C switching specifications..................................49 6.8.7 UART switching specifications..............................49 6.8.8 I2S/SAI Switching Specifications..........................49 6.9 Human-machine interfaces (HMI)......................................54 6.9.1 TSI electrical specifications...................................54 7 Dimensions...............................................................................55 7.1 Obtaining package dimensions.........................................55 8 Pinout........................................................................................56 8.1 K20 Signal Multiplexing and Pin Assignments..................56 8.2 K20 Pinouts.......................................................................58 9 Revision History........................................................................58 Freescale Semiconductor, Inc. ...

Page 3

... Qualification status K## Kinetis family A Key attribute M Flash memory type K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K20 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • Program flash only • ...

Page 4

... LQ = 144 LQFP ( mm) • 144 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Values Freescale Semiconductor, Inc. ...

Page 5

... Description I Digital I/O weak pullup/ WP pulldown current 3.3 Definition: Attribute An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 ...

Page 6

... Result of exceeding a rating Measured characteristic K20 Sub-Family Data Sheet, Rev. 4 5/2012. 6 Min. — 7 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Max. Unit pF Max. Unit V Freescale Semiconductor, Inc. ...

Page 7

... Typical values are provided as design guidelines and are neither tested nor guaranteed. K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Normal operating range Degraded operating range - No permanent failure - No permanent failure ...

Page 8

... Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K20 Sub-Family Data Sheet, Rev. 4 5/2012. 8 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

Page 9

... Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components. 4.4 Voltage and current operating ratings Symbol Description V Digital supply voltage DD K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. –55 — Min. — Min. -2000 -500 -100 Table continues on the next page ...

Page 10

... K20 Sub-Family Data Sheet, Rev. 4 5/2012. 10 Min. Max. Unit — 155 mA –0 0 –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Freescale Semiconductor, Inc. ...

Page 11

... If these limits cannot be observed then a current limiting resistor is required. The negative DC injection current limiting resistor is calculated as R=(V calcualted as R=(V -V )/|I |. Select the larger of these two calculated resistances. IN AIO_MAX IC K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. 1.71 1.71 –0.1 –0.1 1.71 0.7 × 0.75 × — ...

Page 12

... K20 Sub-Family Data Sheet, Rev. 4 5/2012. 12 supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — 1.54 1.74 1.84 1.94 2.04 — 0.97 900 Min. 0.8 Typ. Max. Unit Notes 1.1 1.5 V 2.56 2.64 V 2.70 2.78 V 2.80 2.88 V 2.90 2.98 V 3.00 3.08 V ±80 — mV 1.60 1.66 V 1.80 1.86 V 1.90 1.96 V 2.00 2.06 V 2.10 2.16 V ±60 — mV 1.00 1.03 V 1000 1100 μs Typ. Max. Unit Notes 1.1 1.5 V Freescale Semiconductor, Inc ...

Page 13

... Power mode transition operating behaviors All specifications except t POR assume this clock configuration: • CPU and system clocks = 50 MHz • Bus clock = 50 MHz • Flash clock = 25 MHz K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min – 0 – ...

Page 14

... Table continues on the next page... Max. Unit Notes 300 μs 1 130 μs 130 μs 70 μs 70 μs 6 μs 5.2 μs 5.2 μs Max. Unit Notes See note 15 18.2 mA 17.7 mA 18 Freescale Semiconductor, Inc. ...

Page 15

... I Very low-leakage stop mode 0 current at 3.0 V DD_VLLS0 with POR detect circuit enabled • @ –40 to 25°C • @ 70°C • @ 105°C K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. Typ. — 867 — 1.1 — 509 — ...

Page 16

... No GPIOs toggled K20 Sub-Family Data Sheet, Rev. 4 5/2012. 16 Min. Typ. Max. Unit — 0.176 0.859 μA — 2.2 13.1 μA — 13 23.9 μA — 0.19 0.22 μA — 0.49 0.64 μA — 2.2 3.2 μA — 0.57 0.67 μA — 0.90 1.2 μA — 2.4 3.5 μA — 0.67 0.94 μA — 1.0 1.4 μA — 2.7 3.9 μA Freescale Semiconductor, Inc. Notes 9 ...

Page 17

... Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL Figure 2. Run mode supply current vs. core frequency K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. General 17 ...

Page 18

... TEM Cell Method. Measurements were made while the microcontroller was running basic application code. The reported K20 Sub-Family Data Sheet, Rev. 4 5/2012. 18 Frequency Typ. Unit band (MHz) 0.15–50 19 dBμV 50–150 21 dBμV 150–500 19 dBμV 500–1000 11 dBμV 0.15–1000 L — Freescale Semiconductor, Inc. Notes ...

Page 19

... BUS f Flash clock FLASH f LPTMR clock LPTMR f System and core clock SYS f Bus clock BUS K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc MHz 48MHz SYS BUS Table 8. Capacitance attributes Min. Normal run mode — 20 — — — 1 VLPR mode — ...

Page 20

... Table continues on the next page... Max. Unit Notes 1 MHz 16 MHz 25 MHz 16 MHz 12.5 MHz 4 MHz Max. Unit Notes — Bus clock 1, 2 cycles — — — — Bus clock cycles Freescale Semiconductor, Inc. ...

Page 21

... Four-layer R Thermal θJA (2s2p) resistance, junction to ambient (natural convection) K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. — — — — 48 LQFP 48 QFN Table continues on the next page... General Max. Unit ...

Page 22

... Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air). 6 Peripheral operating requirements and behaviors 6.1 Core modules K20 Sub-Family Data Sheet, Rev. 4 5/2012 LQFP 48 QFN Unit 58 66 °C °C °C/W 18 1.4 °C °C/W Notes 1 Freescale Semiconductor, Inc. ...

Page 23

... TCLK low to TDO data valid J11 Output data hold/invalid time after clock edge 1. They are common for JTAG and CJTAG. Input transition = 1 ns and Output load = 50pf TCLK (input) K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 4 ...

Page 24

... TDO TDO K20 Sub-Family Data Sheet, Rev. 4 5/2012 J11 J12 J11 Figure 6. Test Access Port timing J5 J6 Input data valid Output data valid Output data valid J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

Page 25

... Loss of external clock minimum frequency — loc_low RANGE = 00 f Loss of external clock minimum frequency — loc_high RANGE = 01, 10 K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J14 Figure 7. TRST timing Table 13. MCG specifications Min. Typ. — ...

Page 26

... MHz 2, 50 MHz 75 MHz 100 MHz — MHz 4, — MHz — MHz — MHz ps 180 — 150 — — — 100 MHz — µA 600 — µA — 4.0 MHz 120 — — ps Freescale Semiconductor, Inc ...

Page 27

... Supply current — low-power mode (HGO=0) DDOSC • 32 kHz • 4 MHz • 8 MHz (RANGE=01) • 16 MHz • 24 MHz • 32 MHz K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 1350 — 600 ± 1.49 — ...

Page 28

... MΩ — MΩ — — MΩ 1 — MΩ — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Freescale Semiconductor, Inc ...

Page 29

... This section describes the module electrical characteristics. 6.3.3.1 32 kHz oscillator DC electrical specifications Table 16. 32kHz oscillator DC electrical specifications Symbol Description V Supply voltage BAT R Internal feedback resistor F K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 32 — 3 — 8 — — — ...

Page 30

... Min. — — — — Typ. Max 0.6 — Typ. Max. Unit Notes 32.768 — kHz 1000 — ms 32.768 — kHz V — mV BAT Typ. Max. Unit Notes 7.5 18 μs 13 113 ms 52 452 ms 52 452 ms Freescale Semiconductor, Inc. Unit ...

Page 31

... Byte-write to FlexRAM execution time: t • EEPROM backup eewr8b8k • EEPROM backup t eewr8b16k • EEPROM backup t eewr8b32k K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — — — — ...

Page 32

... Typ. Max. Unit 2.5 6.0 mA 1.5 4.0 mA Max. Unit Notes 1 Typ. 50 — years 100 — years 50 K — cycles 50 — years Freescale Semiconductor, Inc. 2 ...

Page 33

... EEPROM – 2 × EEESIZE Writes_FlexRAM = EEESIZE where • Writes_FlexRAM — minimum number of writes to each FlexRAM location K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. 20 100 ...

Page 34

... Figure 8. EEPROM backup writes to FlexRAM 6.4.2 EzPort Switching Specifications Table 22. EzPort switching specifications Num Description Operating voltage K20 Sub-Family Data Sheet, Rev. 4 5/2012. 34 Table continues on the next page... Min. Max. Unit 1.71 3.6 V Freescale Semiconductor, Inc. ...

Page 35

... EZP_CS EZP_Q (output) EZP_D (input) 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 EP9 EP8 EP7 ...

Page 36

... Table continues on the next page... are achievable on the Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 4 12.0 MHz 5 818.330 Ksps Freescale Semiconductor, Inc. ...

Page 37

... ADC electrical characteristics Table 24. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. 37.037 — = 1.0 MHz unless otherwise stated. Typical values are for ADCK ...

Page 38

... SSA 2 Max. Unit Notes 3 MHz ADACK f ADACK 7.3 MHz 6.1 MHz 9.5 MHz ±6 LSB ±2.1 -1 LSB +1.9 -0.3 to 0.5 -2 LSB +1.9 -0.7 to +0.5 -5 LSB ADIN V DDA -1.8 5 — 4 LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — dB Freescale Semiconductor, Inc. ...

Page 39

... ADC conversion clock <16MHz, Max hardware averaging (AVGE = %1, AVGS = %11) 6. Input data is 100 Hz sine wave. ADC conversion clock <12MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock <12MHz. K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...

Page 40

... Peripheral operating requirements and behaviors Figure 11. Typical ENOB vs. ADC_CLK for 16-bit differential mode Figure 12. Typical ENOB vs. ADC_CLK for 16-bit single-ended mode K20 Sub-Family Data Sheet, Rev. 4 5/2012. 40 Freescale Semiconductor, Inc. ...

Page 41

... Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN, VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level LSB = V /64 reference K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — — ...

Page 42

... Peripheral operating requirements and behaviors 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0.1 0.4 0.7 Figure 13. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K20 Sub-Family Data Sheet, Rev. 4 5/2012 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR S etting 2.5 2.8 3.1 Freescale Semiconductor, Inc. ...

Page 43

... Table 27. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 −40 value over the operating temperature range of L Min ...

Page 44

... Min. Max. Unit 0 50 °C Min. Max. Unit 1.173 1.225 V Freescale Semiconductor, Inc. Unit Notes µ µ µ Notes Notes ...

Page 45

... Regulator output voltage — Input supply Reg33out (VREGIN) > 3.6 V • Run mode • Standby mode V Regulator output voltage — Input supply Reg33out (VREGIN) < 3.6 V, pass-through mode K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 0.5 0 14.25 0.25 Min. ...

Page 46

... Min. Max. Unit 2.7 3.6 V — 25 MHz — ns BUS (t /2) − / SCK SCK ( − — ns BUS − — ns BUS 2 — — — — ns Freescale Semiconductor, Inc. Notes μF . Load Notes 1 2 ...

Page 47

... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 16. DSPI classic SPI timing — slave mode K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...

Page 48

... BUS − BUS 4 — -1.2 19.1 0 DS1 DS2 DS8 Data Last data First data DS5 DS6 First data Data Last data Max. Unit Notes 3 12.5 MHz — SCK/2) — — 8.5 ns — ns — ns — ns DS4 Freescale Semiconductor, Inc. ...

Page 49

... Figure 18. DSPI classic SPI timing — slave mode 6.8 switching specifications See General switching specifications. 6.8.7 UART switching specifications See General switching specifications. K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data Data Min. ...

Page 50

... I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 4 5/2012. 50 Min. Max. 1.71 3 — ns 45% 55% MCLK period 80 — ns 45% 55% BCLK period — — ns — — — — ns Freescale Semiconductor, Inc. Unit ...

Page 51

... I2S_RXD setup before I2S_RX_BCLK S18 I2S_RXD hold after I2S_RX_BCLK S19 I2S_TX_FS input assertion to I2S_TXD output valid 1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors ...

Page 52

... I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 4 5/2012. 52 S11 S12 S15 S16 S18 Min. 1.71 62.5 45% 250 45% — 0 — S16 S14 S16 Max. Unit 3.6 V — ns 55% MCLK period — ns 55% BCLK period 45 ns — — ns — ns — ns Freescale Semiconductor, Inc. ...

Page 53

... I2S_RXD setup before I2S_RX_BCLK S18 I2S_RXD hold after I2S_RX_BCLK S19 I2S_TX_FS input assertion to I2S_TXD output valid 1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors ...

Page 54

... Table continues on the next page... S16 S14 S16 Max. Unit Notes 3.6 V 500 MHz 2, 3 1.8 MHz 2, 4 — pF — μ μ 38400 fF/count 8 38400 fF/count 9 38400 fF/count 10 — fF/count 11 16 bits Freescale Semiconductor, Inc. ...

Page 55

... Package dimensions are provided in package drawings. To find a package drawing search for the drawing’s document number: If you want the drawing for this package 48-pin LQFP 48-pin QFN K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Min. Typ — 55 — ...

Page 56

... K20 Sub-Family Data Sheet, Rev. 4 5/2012. 56 ALT1 ALT2 ALT3 ALT4 PTA0 UART0_CTS_ FTM0_CH5 b/ UART0_COL_b PTA1 UART0_RX FTM0_CH6 PTA2 UART0_TX FTM0_CH7 PTA3 UART0_RTS_b FTM0_CH0 PTA4/ FTM0_CH1 LLWU_P3 ALT5 ALT6 ALT7 EzPort JTAG_TCLK/ EZP_CLK SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b Freescale Semiconductor, Inc. ...

Page 57

... PTD3 DISABLED 45 PTD4/ DISABLED LLWU_P14 46 PTD5 ADC0_SE6b ADC0_SE6b 47 PTD6/ ADC0_SE7b ADC0_SE7b LLWU_P15 48 PTD7 DISABLED K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA18 FTM0_FLT2 FTM_CLKIN0 PTA19 FTM1_FLT0 FTM_CLKIN1 PTB0/ I2C0_SCL FTM1_CH0 LLWU_P5 PTB1 I2C0_SDA FTM1_CH1 PTB2 ...

Page 58

... VREFH 10 VREFL 11 VSSA 12 Figure 23. K20 48 LQFP/QFN Pinout Diagram 9 Revision History The following table provides a revision history for this document. K20 Sub-Family Data Sheet, Rev. 4 5/2012 PTC3/LLWU_P7 35 PTC2 34 PTC1/LLWU_P6 33 PTC0 PTB17 32 PTB16 31 PTB3 30 PTB2 29 PTB1 28 PTB0/LLWU_P5 27 RESET_b 26 PTA19 25 Freescale Semiconductor, Inc. ...

Page 59

... Corrected the following DSPI switching specifications: tightened DS5, DS6, and DS7; relaxed DS11 and DS13. • For the "TSI electrical specifications", changed and clarified the example calculations for the MaxSens specification. K20 Sub-Family Data Sheet, Rev. 4 5/2012. Freescale Semiconductor, Inc. Table 41. Revision History Revision History 59 ...

Page 60

... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...

Related keywords