MAX13103EETL+ Maxim Integrated Products, MAX13103EETL+ Datasheet - Page 15

• Manufacturer Part Number: MAX13103EETL+
• Description: IC TRANSL LOGIC 16CH 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX13103EETL+

• Logic Function: Translator, Bidirectional, 3-State
• Number Of Bits: 16
• Input Type: CMOS
• Output Type: CMOS
• Data Rate: 20Mbps
• Number Of Channels: 16
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Propagation Delay (max): 20ns
• Voltage - Supply: 1.65 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-WFQFN Exposed Pad
• Supply Voltage: 1.65 V ~ 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Figure 8a shows the Human Body Model and Figure 8b
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the test device
through a 1.5kΩ resistor.
The Machine Model for ESD tests all pins using a
200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. All pins require this protection during
manufacturing, not just inputs and outputs. Therefore,
after PC board assembly, the Machine Model is less
relevant to I/O ports.
Figure 8a. Human Body ESD Test Model
VOLTAGE
SOURCE
HIGH-
DC
CHARGE-CURRENT-
LIMIT RESISTOR
R
C
100pF
1MΩ
C
______________________________________________________________________________________
S
RESISTANCE
DISCHARGE
R
STORAGE
CAPACITOR
D
1500Ω
ESD Test Conditions
Human Body Model
Machine Model
DEVICE
UNDER
TEST
16-Channel Buffered CMOS
Logic-Level Translators
To reduce ripple and the chance of transmitting incor-
rect data, bypass V
capacitors. To ensure full ±15kV ESD protection,
bypass V
Place all capacitors as close to the power-supply inputs
as possible.
Capacitive loading on the I/O lines impacts the rise time
(and fall time) of the MAX13101E/MAX13102E/
MAX13103E/MAX13108E when driving the signal lines.
The actual rise time is a function of the parasitic capaci-
tance, the supply voltage, and the drive impedance of
the MAX13101E/MAX13102E/MAX13103E/MAX13108E.
For proper operation, the signal must reach the V
required before the rise-time accelerators turn off.
Figure 8b. Human Body Model Current Waveform
AMPERES
I
P
36.8%
100%
CC
90%
10%
0
to ground with a 1µF ceramic capacitor.
0
Applications Information
t
RL
L
Power-Supply Decoupling
and V
CURRENT WAVEFORM
TIME
t
DL
CC
I
r
Capacitive Loading
to ground with 0.1µF
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
OH
15
as