MK50DX256CMD10 Freescale Semiconductor, MK50DX256CMD10 Datasheet
MK50DX256CMD10
Specifications of MK50DX256CMD10
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MK50DX256CMD10 Summary of contents
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... Three analog comparators (CMP) containing a 6-bit DAC and programmable reference input – Voltage reference Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2012 Freescale Semiconductor, Inc. Document Number: K50P81M72SF1 Rev. 3, 11/2012 K50P81M72SF1 • Timers – ...
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... DSPI switching specifications (limited voltage range)....................................................................58 6.8.5 DSPI switching specifications (full voltage range).60 6.8.6 I2C switching specifications..................................62 6.8.7 UART switching specifications..............................62 6.8.8 I2S/SAI Switching Specifications..........................62 6.9 Human-machine interfaces (HMI)......................................66 6.9.1 TSI electrical specifications...................................66 7 Dimensions...............................................................................67 7.1 Obtaining package dimensions.........................................67 8 Pinout........................................................................................68 8.1 K50 Signal Multiplexing and Pin Assignments..................68 Freescale Semiconductor, Inc. ...
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... K50 Pinouts.......................................................................71 K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. 9 Revision History........................................................................72 3 ...
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... Description • Fully qualified, general market flow • Prequalification • K50 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • Program flash only • Program flash and FlexMemory Table continues on the next page... Values Freescale Semiconductor, Inc. ...
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... An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Description • • • ...
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... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 6 Min. Max. 0.9 1.1 Min. Max. 10 130 Min. Max. — 7 Unit V Unit µA Unit pF Freescale Semiconductor, Inc. ...
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... Result of exceeding a rating Measured characteristic K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Terminology and guidelines Max. ...
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... Normal operating range Degraded operating range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Operating (power on) Handling range No permanent failure Handling (power off) Fatal range Expected permanent failure ∞ Fatal range Expected permanent failure ∞ Freescale Semiconductor, Inc. ...
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... Typical value conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Terminology and guidelines Max. ...
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... K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 10 Min. –55 — Min. — Min. -2000 -500 -100 Table continues on the next page... Max. Unit Notes 150 °C 1 260 °C 2 Max. Unit Notes 3 — 1 Max. Unit Notes +2000 V 1 +500 V 2 +100 mA Min. Max. Unit –0.3 3.8 V Freescale Semiconductor, Inc. ...
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... Nonswitching electrical specifications K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. General Min. Max. Unit — ...
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... DD -V )/|I |. The positive injection current limiting resistor is AIO_MIN IN IC Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — — 0.35 × 0.3 × — — — +5 — mA +25 — V — greater than V IN AIO_MIN Freescale Semiconductor, Inc ...
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... Internal low power oscillator period — factory LPO trimmed 1. Rising thresholds are falling threshold + hysteresis voltage Table 3. VBAT power operating requirements Symbol Description V Falling VBAT supply POR detect voltage POR_VBAT K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — 1.54 1 ...
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... Vinput = min and Vinput = and VLLSx→RUN recovery times in the following table Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μA 1 0.025 μ μA 50 kΩ kΩ 3 Freescale Semiconductor, Inc. ...
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... I Very-low-power run mode current at 3.0 V — all DD_VLPR peripheral clocks disabled I Very-low-power run mode current at 3.0 V — all DD_VLPR peripheral clocks enabled K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Min. — DD — — — — — — ...
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... Table continues on the next page... Max. Unit Notes — 0.567 mA 0.793 mA 1.2 mA 32.7 μA 59.8 μA 188 μA 9 8.6 μA 29.1 μA 92.5 μA 9 5.8 μA 12.1 μA 41.9 μA 5.5 μA 9.5 μA 34 μA 5.4 μA 8.1 μA 32 μA 0.22 μA 0.64 μA 3.2 μA Freescale Semiconductor, Inc. ...
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... USB regulator disabled • No GPIOs toggled • Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Min. Typ. Max. Unit — ...
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... General Figure 2. Run mode supply current vs. core frequency K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 18 Freescale Semiconductor, Inc. ...
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... Perform a keyword search for “EMC design.” 5.2.7 Capacitance attributes Symbol Description C Input capacitance: analog pins IN_A C Input capacitance: digital pins IN_D K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Table 7. Capacitance attributes General Min. Max. Unit — — ...
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... Min. 1.5 Table continues on the next page... Max. Unit Notes 72 MHz — MHz 50 MHz 50 MHz 25 MHz 25 MHz 4 MHz 4 MHz 4 MHz 0.5 MHz 16 MHz 25 MHz 16 MHz 8 MHz 12.5 MHz 4 MHz Max. Unit Notes — Bus clock 1, 2 cycles Freescale Semiconductor, Inc. ...
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... Thermal specifications 5.4.1 Thermal operating requirements Table 10. Thermal operating requirements Symbol Description T Die junction temperature J T Ambient temperature A K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Min. Max. Unit 100 — — ns 100 — — ...
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... Thermal 30 resistance, junction to ambient (200 ft./ min. air speed) Thermal 20 resistance, junction to board Thermal 10 resistance, junction to case Thermal 2 characterization parameter, junction to package top outside center (natural convection) Unit Notes °C °C °C/W 1,3 °C/W 1,3 °C/W 4 °C/W 5 °C/W 6 Freescale Semiconductor, Inc. ...
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... TRACE_D[3:0] Figure 5. Trace data specifications 6.1.2 JTAG electricals Table 12. JTAG limited voltage range electricals Symbol Description Operating voltage K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Frequency dependent Ts Th Table continues on the next page... Min. Max. ...
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... Min. Max. Unit 1.71 3.6 V MHz 1/J1 — — — ns 12.5 — ns — — — ns Freescale Semiconductor, Inc. ...
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... TRST setup time (negation) to TCLK high TCLK (input) TCLK Data inputs Data outputs Data outputs Data outputs Figure 7. Boundary scan (JTAG) timing K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 6. Test clock input timing Min ...
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... There are no specifications necessary for the device's system modules. 6.3 Clock modules K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 26 J11 J12 J11 Figure 8. Test Access Port timing J14 Figure 9. TRST timing J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...
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... High range (DRS=11) f DCO output Low range (DRS=00) dco_t_DMX32 frequency Mid range (DRS=01) Mid-high range (DRS=10) High range (DRS=11) K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 14. MCG specifications Min. — 32.768 31.25 — ± 0.3 — ...
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... Max. Unit Notes ps — — 100 MHz 7 — µA 7 — µA 4.0 MHz 8 — ps — — ps — ps ± 2.98 % ± 5. 150 × 1075( pll_ref Freescale Semiconductor, Inc. ...
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... Series resistor — low-frequency, high-gain mode (HGO=1) Series resistor — high-frequency, low-power mode (HGO=0) Series resistor — high-frequency, high-gain mode (HGO=1) K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 1.71 — — 500 — ...
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... Typ. Max. Unit Notes 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz — 32 MHz — 50 MHz 750 — 250 — ms 0.6 — — ms Freescale Semiconductor, Inc ...
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... V 6.4 Memories and memory interfaces 6.4.1 Flash electrical specifications This section describes the electrical characteristics of the flash memory module. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors NOTE Min. — — ...
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... Table continues on the next page... Max. Unit Notes 18 μs 113 ms 1 452 ms 1 904 ms 1 Max. Unit Notes 0 μ μ μ μs 1 145 μs 2 465 ms 985 ms 114 ms 2 — ms — ms — ms — μs 1 — μs 1500 ms 2 Freescale Semiconductor, Inc. ...
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... Assumes 25 MHz flash clock frequency. 2. Maximum times for erase parameters based on expectations at cycling end-of-life. 3. For byte-writes to an erased FlexRAM location, the aligned word containing the byte must be erased. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — ...
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... 100 M ≤ 125°C. j Max. Unit 6.0 mA 4.0 mA Max. Unit Notes — years — years — cycles 2 — years — years — cycles 2 — years — years 3 — writes — writes — writes — writes — writes Freescale Semiconductor, Inc. ...
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... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance (the following graph assumes 10,000 nvmcycd cycles) K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EEESPLIT × EEESIZE × Write_efficiency × n nvmcycd 35 ...
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... EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 36 Min. Max. Unit 1.71 3.6 V — MHz SYS — MHz SYS — ns EZP_CK 5 — — — — ns — — ns — Freescale Semiconductor, Inc. ...
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... Data and FB_TA input setup FB5 Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 EP9 ...
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... Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 38 Min. Max. Unit 1.71 3.6 V — FB_CLK MHz 1/FB_CLK — ns — 13 — ns 13.7 — ns 0.5 — ns Freescale Semiconductor, Inc. Notes ...
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... FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 12. FlexBus read timing diagram K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ 39 ...
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... FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 13. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 40 FB3 Address Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...
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... ADCK clock frequency C ADC conversion ≤ 13 bit modes rate rate No ADC hardware averaging Continuous conversions enabled, subsequent conversion time K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 26 and Table 27 Min. Typ. 1. -100 DD ...
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... INPUT PIN = V REFH DDA 1 Min. Typ. 0.215 — Table continues on the next page... 1 Max. Unit Notes 5 461.467 Ksps /C AS SIMPLIFIED CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 Freescale Semiconductor, Inc. AS ...
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... Avg = 32 16-bit single-ended mode • Avg = 32 SFDR Spurious free 16-bit differential mode dynamic range • Avg = 32 16-bit single-ended mode • Avg = 32 K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. 1.2 2 ...
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... Typ. I × — 1.715 — 719 = V REFH DDA = 2.0 MHz unless otherwise stated. Typical values are for ADCK = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV Freescale Semiconductor, Inc. ...
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... R Differential input Gain = PGAD impedance Gain = 16, 32 Gain = 64 R Analog source AS resistance T ADC sampling S time K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 1.71 — VREF_OU VREF_OU VREF_OU — SSA V — ...
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... MHz unless otherwise stated. Typical values are for ADCK PGAD Min. Typ. — 420 =1.2V, — 1.54 REFPGA =1.2V, — 0.57 REFPGA Table continues on the next page... Max. Unit Notes 450 Ksps 7 250 Ksps 8 /2 causes drop AS 1 Max. Unit Notes 644 μ — μA — μA Freescale Semiconductor, Inc. ...
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... V Maximum PP,DIFF differential input signal swing SNR Signal-to-noise • Gain=1 ratio • Gain=64 THD Total harmonic • Gain=1 distortion • Gain=64 K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 0.95 1 1.9 2 3.8 4 7.6 8 15.2 16 30.0 31.6 58.8 63.3 — ...
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... Typ. Max. Unit — 3.6 V — 200 μA — 20 μA — — — — — — mV Freescale Semiconductor, Inc. ...
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... VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level LSB = V /64 reference 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0.1 0.4 0.7 Figure 17. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. V – 0.5 DD — — — –0.5 –0.3 -0.6V 1.3 1 ...
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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K50 Sub-Family Data Sheet, Rev. 3, 11/2012 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 Operating temperature range of the device — — or the voltage output of the VREF module (VREF_OUT) DDA HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 °C 100 Freescale Semiconductor, Inc. ...
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... Calculated by a best fit curve from 3.0 V, reference select set for V DDA 0x800, temperature range is across the full range of the device K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — — ...
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... Peripheral operating requirements and behaviors Figure 19. Typical INL error vs. digital code K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 52 Freescale Semiconductor, Inc. ...
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... Typical input offset current across the following temp OS range (0–50°C) I Typical input offset current across the following temp OS range (-40–105°C) K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — — — — ...
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... Min. Max. Unit 1.71 3.6 V -0.1 V -1.4 V DDA — 100 pf Freescale Semiconductor, Inc. Unit MΩ pF MΩ V/μs V/μs MHz MHz dB pF Ω deg μs μs nV/√Hz nV/√Hz Notes ...
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... Symbol Description V Supply voltage DDA V Input voltage range IN T Temperature A C Output load capacitance L K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. — μA — 280 450 μA — ±3 ±5 mV — ...
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... High speed mode — kΩ — dB — dB — V/μs — V/μs — MHz — MHz — dB — dB — deg Max. Unit Notes 3.6 V ° Max. Unit Notes 1.1977 V 1.2376 V 1.197 V — mV Freescale Semiconductor, Inc. ...
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... The USB electricals for the USB On-the-Go module conform to the standards documented by the Universal Serial Bus Implementers Forum. For the most up-to-date standards, visit http://www.usb.org. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...
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... Unit 2.7 — 5.5 — 120 186 μA — 1.1 10 μA — 650 — — — 4 μA — — 120 mA — — 3.3 3.6 2.1 2.8 3.6 2.1 — 3.6 1.76 2.2 8.16 1 — 100 mΩ — 290 — mA Freescale Semiconductor, Inc. Unit V V μA μA kΩ V Notes μF . Load ...
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... Figure 21. DSPI classic SPI timing — master mode Table 45. Slave mode DSPI timing (limited voltage range) Num Operating voltage Frequency of operation DS9 DSPI_SCK input cycle time K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 2.7 — BUS (t /2) − ...
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... Min. Max. Unit (t /2) − / SCK SCK — — — — ns — — DS9 DS16 DS11 Last data Last data Max. Unit Notes 3 12.5 MHz — SCK/2) — Freescale Semiconductor, Inc. ...
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... DSPI_SCK to DSPI_SOUT invalid DS13 DSPI_SIN to DSPI_SCK input setup DS14 DSPI_SCK to DSPI_SIN input hold DS15 DSPI_SS active to DSPI_SOUT driven DS16 DSPI_SS inactive to DSPI_SOUT not driven K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min − BUS 4 — -4.5 20.5 ...
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... This section provides the operating performance over the full operating voltage for the device in Normal Run, Wait and Stop modes. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 62 DS10 DS15 DS12 First data Data DS14 First data Data DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...
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... Table 49. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes (full voltage range) Num. Characteristic Operating voltage S11 I2S_TX_BCLK/I2S_RX_BCLK cycle time (input) S12 I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 40 45% 80 45% — -1.0 — ...
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... S19 S16 S17 S18 Min. 1.71 62.5 45% 250 45% Table continues on the next page... K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Max. Unit — ns — ns — ns — ns — S16 S14 S16 Max. Unit 3.6 V — ns 55% MCLK period — ns 55% BCLK period Freescale Semiconductor, Inc. ...
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... I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) S13 I2S_TX_FS/I2S_RX_FS input setup before I2S_TX_BCLK/I2S_RX_BCLK S14 I2S_TX_FS/I2S_RX_FS input hold after I2S_TX_BCLK/I2S_RX_BCLK S15 I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output valid S16 I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output invalid Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — 0 — ...
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... Table continues on the next page... K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Max. Unit — ns — S16 S14 S16 Typ. Max. Unit Notes — 3 500 MHz 2, 1 1.8 MHz 2, 1 — pF 500 — μ Freescale Semiconductor, Inc ...
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... Data is captured with an average of 7 periods window. 7 Dimensions 7.1 Obtaining package dimensions Package dimensions are provided in package drawings. To find a package drawing the drawing’s document number: K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. Min. Typ. — 2 — 36 — ...
Page 68
... ADC1_DM0/ ADC1_DM0/ ADC1_DM0/ ADC0_DM3 ADC0_DM3 ADC0_DM3 15 VDDA VDDA VDDA 16 VREFH VREFH VREFH 17 VREFL VREFL VREFL 18 VSSA VSSA VSSA K50 Sub-Family Data Sheet, Rev. 3, 11/2012. 68 Then use this document number 98ASS23174W ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort Freescale Semiconductor, Inc. ...
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... TRACE_SWO/ EZP_DO 36 PTA3 JTAG_TMS/ TSI0_CH4 SWD_DIO 37 PTA4/ NMI_b/ TSI0_CH5 LLWU_P3 EZP_CS_b 38 VDD VDD VDD K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA0 UART0_CTS_ FTM0_CH5 b/ UART0_COL_b PTA1 UART0_RX FTM0_CH6 PTA2 UART0_TX FTM0_CH7 PTA3 UART0_RTS_b FTM0_CH0 PTA4/ ...
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... ALT6 ALT7 EzPort LPTMR0_ALT1 FTM1_QD_ PHA FTM1_QD_ PHB FTM0_FLT3 FTM0_FLT0 FB_AD19 FTM0_FLT1 FB_AD18 FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT_b FTM2_QD_ PHA FB_OE_b FTM2_QD_ PHB FB_AD14 I2S0_TXD1 FB_AD13 I2S0_TXD0 FB_AD12 I2S0_TX_FS CLKOUT I2S0_TX_BCLK FB_AD11 CMP1_OUT FB_AD10 CMP0_OUT I2S0_MCLK FB_AD8 FB_AD7 Freescale Semiconductor, Inc. ...
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... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...
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... Table 53. Revision History Table continues on the next page... 60 VDD 59 VSS 58 PTC3/LLWU_P7 57 PTC2 56 PTC1/LLWU_P6 55 PTC0 54 PTB19 53 PTB18 52 PTB17 51 PTB16 50 VDD 49 VSS 48 PTB11 47 PTB10 46 PTB3 45 PTB2 44 PTB1 43 PTB0/LLWU_P5 42 RESET_b 41 PTA19 Freescale Semiconductor, Inc. ...
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... Updated orderable part numbers. • Updated the maximum input voltage (V conditions" section. • Updated the maximum I section. K50 Sub-Family Data Sheet, Rev. 3, 11/2012. Freescale Semiconductor, Inc. ) specification in the "16-bit ADC operating ADIN specification in the "USB VREG electrical specifications" DDstby Revision History ...
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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...