MK20DX256VMC10 Freescale Semiconductor, MK20DX256VMC10 Datasheet
MK20DX256VMC10
Specifications of MK20DX256VMC10
Related parts for MK20DX256VMC10
MK20DX256VMC10 Summary of contents
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... Freescale Semiconductor Data Sheet: Technical Data K20 Sub-Family Supports the following: MK20DX256VMC10, MK20DN512VMC10 Features • Operating Characteristics – Voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40 to 105°C • Performance – 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1 ...
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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 2 Freescale Semiconductor, Inc. ...
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... Device clock specifications.................................20 5.3.2 General switching specifications.........................21 5.4 Thermal specifications.......................................................22 5.4.1 Thermal operating requirements.........................22 5.4.2 Thermal attributes...............................................22 K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Table of Contents 6 Peripheral operating requirements and behaviors....................23 6.1 Core modules....................................................................23 6.1.1 Debug trace timing specifications.......................23 6.1.2 JTAG electricals..................................................24 6.2 System modules................................................................27 6.3 Clock modules...................................................................27 6 ...
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... Revision History........................................................................76 K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 4 Freescale Semiconductor, Inc. ...
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... Qualification status K## Kinetis family A Key attribute M Flash memory type K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. www.freescale.com and perform a part number search for Description • Fully qualified, general market flow • Prequalification • K20 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • ...
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... LQ = 144 LQFP ( mm) • 144 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Values Freescale Semiconductor, Inc. ...
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... An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. 3.3.1 Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 Min. ...
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... V core supply DD voltage 3.5 Result of exceeding a rating Measured characteristic K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 8 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Max. Unit V Freescale Semiconductor, Inc. ...
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... Typical values are provided as design guidelines and are neither tested nor guaranteed. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Normal operating range Degraded operating range - No permanent failure - No permanent failure ...
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... Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 10 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...
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... Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components. 4.4 Voltage and current operating ratings Symbol Description V Digital supply voltage DD K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. –55 — Min. — Min. -2000 -500 -100 Table continues on the next page ...
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... Nonswitching electrical specifications K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 12 Min. Max. Unit — 185 mA –0.3 5.5 V –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Freescale Semiconductor, Inc. ...
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... If these limits cannot be observed then a current limiting resistor is required. The negative DC injection current limiting resistor is calculated as R=(V calculated as R=(V -V )/|I |. Select the larger of these two calculated resistances. IN AIO_MAX IC K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. 1.71 1.71 –0.1 –0.1 1.71 0.7 × V 0.75 × V — ...
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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 14 supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — 1.54 1.74 1.84 1.94 2.04 — 0.97 900 Min. 0.8 Typ. Max. Unit Notes 1.1 1.5 V 2.56 2.64 V 2.70 2.78 V 2.80 2.88 V 2.90 2.98 V 3.00 3.08 V ±80 — mV 1.60 1.66 V 1.80 1.86 V 1.90 1.96 V 2.00 2.06 V 2.10 2.16 V ±60 — mV 1.00 1.03 V 1000 1100 μs Typ. Max. Unit Notes 1.1 1.5 V Freescale Semiconductor, Inc ...
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... All specifications except t POR assume this clock configuration: • CPU and system clocks = 100 MHz • Bus clock = 50 MHz • FlexBus clock = 50 MHz • Flash clock = 25 MHz K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. = -9mA V – 0 -3mA V – ...
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... Table continues on the next page... Max. Unit Notes 300 μs 1 112 μs 74 μs 73 μs 5.9 μs 5.8 μs 5 μs Max. Unit Notes See note — — — — Freescale Semiconductor, Inc. ...
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... I Average current with RTC and 32kHz disabled at DD_VBAT 3.0 V • @ –40 to 25°C • @ 70°C • @ 105°C K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Typ. — 0.77 — 0.74 — 2.45 — 6.61 — ...
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... Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 18 Min. Typ. Max. Unit — 0.57 0.67 μA — 0.90 1.2 μA — 2.4 3.5 μA — 0.67 0.94 μA — 1.0 1.4 μA — 2.7 3.9 μA Freescale Semiconductor, Inc. Notes 10 ...
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... ° MHz (crystal OSC K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Frequency Typ. band (MHz) 0.15–50 23 50–150 27 150–500 28 500– ...
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... VLPR mode — — — — — Table continues on the next page... Min. Max. Unit — — Max. Unit Notes 100 MHz — MHz 50 MHz 50 MHz 25 MHz 25 MHz 4 MHz 4 MHz 4 MHz 0.5 MHz 16 MHz Freescale Semiconductor, Inc. ...
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... Port rise and fall time (low drive strength) • Slew disabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD • Slew enabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Min. Max. Unit — 25 MHz — 16 MHz — 8 MHz — 12.5 MHz — ...
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... Thermal 31 resistance, junction to ambient (200 ft./ min. air speed) Thermal 17 resistance, junction to board Thermal 13 resistance, junction to case Table continues on the next page... Min. Max. Unit –40 125 °C –40 °C Unit Notes °C/W 1 °C/W 1 °C/W 1 °C/W 1 °C/W 2 °C/W 3 Freescale Semiconductor, Inc. ...
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... T Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description 121 MAPBGA Thermal 3 characterization parameter, junction to package top outside center (natural convection) ...
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... Ts Th Min. Max. Unit 2.7 3.6 V MHz 1/J1 — — — — ns — — — ns — — — — ns — — 100 — — ns Min. Max. Unit 1.71 3.6 V Freescale Semiconductor, Inc. ...
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... J12 TCLK low to TDO high-Z J13 TRST assert time J14 TRST setup time (negation) to TCLK high TCLK (input) K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 5. Test clock input timing Min. Max. ...
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... TDO TDO K20 Sub-Family Data Sheet, Rev. 2, 12/2012 J11 J12 J11 Figure 7. Test Access Port timing J5 J6 Input data valid Output data valid Output data valid J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...
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... Loss of external clock minimum frequency — loc_low RANGE = 00 f Loss of external clock minimum frequency — loc_high RANGE = 01, 10 K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J14 Figure 8. TRST timing Table 15. MCG specifications Min. Typ. — ...
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... MHz 4, — MHz — MHz — MHz ps 180 — 150 — — — 100 MHz — µA 600 — µA — 4.0 MHz 120 — — ps — ps 600 — ps — ± 2.98 % — ± 5.97 % Freescale Semiconductor, Inc ...
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... Supply current — low-power mode (HGO=0) DDOSC • 32 kHz • 4 MHz • 8 MHz (RANGE=01) • 16 MHz • 24 MHz • 32 MHz K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — Min. Typ. 1.71 — ...
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... MΩ — MΩ — — MΩ 1 — MΩ — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Freescale Semiconductor, Inc ...
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... This section describes the module electrical characteristics. 6.3.3.1 32 kHz oscillator DC electrical specifications Table 18. 32kHz oscillator DC electrical specifications Symbol Description V Supply voltage BAT R Internal feedback resistor F K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 32 — 3 — 8 — — — ...
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... Min. — — — Min. Typ. Max. — — 0.6 — Typ. Max. Unit Notes 32.768 — kHz 1000 — ms 32.768 — kHz — BAT Typ. Max. Unit Notes 7.5 18 μs 13 113 ms 104 904 ms Freescale Semiconductor, Inc. Unit ...
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... KB EEPROM backup setram64k t • 256 KB EEPROM backup setram256k t Byte-write to erased FlexRAM location execution eewr8bers time K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — — — — — ...
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... Typ. Max. Unit 2.5 6.0 mA 1.5 4.0 mA Freescale Semiconductor, Inc. ...
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... EEPROM record management system raises the number of program/erase cycles that can be attained prior to device wear-out by cycling the EEPROM data through a larger EEPROM NVM storage space. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. ...
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... Write_efficiency — • 0.25 for 8-bit writes to FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance (the following graph assumes 10,000 nvmcycd cycles) K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 36 EEESPLIT × EEESIZE × Write_efficiency × n nvmcycd Freescale Semiconductor, Inc. ...
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... EZP_CK high to EZP_D input invalid (hold) EP7 EZP_CK low to EZP_Q output valid EP8 EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 1.71 3.6 — f ...
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... Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 38 EP3 EP2 EP4 EP9 EP8 EP7 EP5 EP6 Figure 10. EzPort Timing Diagram Min. 2.7 — 20 — 0.5 8.5 0.5 Max. Unit Notes 3.6 V FB_CLK MHz — — — — Freescale Semiconductor, Inc. ...
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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1 ...
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... Peripheral operating requirements and behaviors FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 40 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...
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... FB_TA FB_TSIZ[1:0] Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data AA=1 AA=0 FB4 ...
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... Table 29 and 1 Max. Unit Notes — 3 +100 +100 DDA DDA V V SSA SSA — 31/ VREFH — VREFH kΩ 3 — 5 kΩ — 18.0 MHz 4 — 12.0 MHz 4 5 — 818.330 Ksps Freescale Semiconductor, Inc. ...
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... ADC electrical characteristics Table 28. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 37.037 — = 1.0 MHz unless otherwise stated. Typical values are for ADCK ADC calculator tool ...
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... Notes 3 MHz ADACK f ADACK 6.1 MHz 7.3 MHz 9.5 MHz 4 ±6.8 LSB 5 ±2.1 4 -1.1 to +1.9 LSB 5 -0.3 to 0.5 4 -2.7 to +1.9 LSB 5 -0.7 to +0.5 4 -5.4 LSB V = ADIN V DDA -1 — LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — — dB — dB Freescale Semiconductor, Inc. ...
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... Input data is 100 Hz sine wave. ADC conversion clock < 12 MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock < 12 MHz. Figure 14. Typical ENOB vs. ADC_CLK for 16-bit differential mode K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...
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... VREF_OU VREF_OU VREF_OU — SSA V — SSA — 128 — 64 — 32 — 100 1.25 — Table continues on the next page... Max. Unit Notes 3 DDA V V DDA 4 — kΩ IN+ to IN- — — — Ω 5 — µs 6 Freescale Semiconductor, Inc. ...
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... I Input DC current DC_PGA Gain = =0.5V CM Gain =64 =0.1V CM K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 18.484 — 37.037 — MHz unless otherwise stated. Typical values are for ADCK PGAD Min. ...
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... V from 1.71 DDA to 3.6V 0.31 %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =100Hz in Freescale Semiconductor, Inc. ...
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... Supply voltage DD I Supply current, High-speed mode (EN=1, PMODE=1) DDHS I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 85 105 53 88 11.6 13.4 8.0 13.6 7.2 9.6 6.3 9 ...
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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 50 Min. 1 — — — — V – 0.5 DD — — — –0.5 –0.3 -0.6V. DD Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA 3 — 0.5 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...
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... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR S etting 2.5 2.8 3.1 51 ...
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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K20 Sub-Family Data Sheet, Rev. 2, 12/2012 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 Operating temperature range of the device — — or the voltage output of the VREF module (VREF_OUT) DDA HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 °C 100 Freescale Semiconductor, Inc. ...
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... Calculated by a best fit curve from V 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...
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... Peripheral operating requirements and behaviors Figure 18. Typical INL error vs. digital code K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 54 Freescale Semiconductor, Inc. ...
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... VREF_OUT if the VREF_OUT functionality is being used for either an internal or external L reference. 2. The load capacitance should not exceed +/-25% of the nominal specified C the device. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1.71 3 ...
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... Min. Max. Unit 0 50 °C Min. Max. Unit 1.173 1.225 V Freescale Semiconductor, Inc. Unit Notes µ µ µ Notes Notes ...
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... Standby mode V Regulator output voltage — Input supply Reg33out (VREGIN) < 3.6 V, pass-through mode C External output capacitor OUT ESR External output capacitor equivalent series resistance K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 0.5 0 14.25 0.25 Min. Typ. 2.7 — ...
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... Max. Unit — 290 — mA Min. Max. Unit 2.7 3.6 V — 25 MHz — ns BUS (t /2) − / SCK SCK ( − — ns BUS − — ns BUS 2 — — — — ns Freescale Semiconductor, Inc. Notes . Load Notes 1 2 ...
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... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 21. DSPI classic SPI timing — slave mode K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...
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... Last data First data DS5 DS6 First data Data Last data Description Table continues on the next page... Max. Unit Notes 3 12.5 MHz — SCK/2) — — 8.5 ns — ns — ns — ns DS4 Min. Max. Unit 1.71 3.6 V — 6.25 MHz Freescale Semiconductor, Inc. ...
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... Figure 23. DSPI classic SPI timing — slave mode 2 6.8 switching specifications See General switching specifications. 6.8.8 UART switching specifications See General switching specifications. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data Data Min. ...
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... K20 Sub-Family Data Sheet, Rev. 2, 12/2012. 62 Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 24. SDHC timing Min. Max. Unit 0 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — — 6 — — ns Freescale Semiconductor, Inc. ...
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... I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/ I2S_RX_FS output invalid S7 I2S_TX_BCLK to I2S_TXD valid S8 I2S_TX_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 2.7 3 — ns 45% 55% ...
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... Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 2, 12/2012 S10 Min. 2.7 80 45% 4.5 2 — — — S6 S10 S8 Max. Unit 3.6 V — ns 55% MCLK period — ns — — ns — ns — Freescale Semiconductor, Inc. ...
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... I2S_RX_FS output invalid S7 I2S_TX_BCLK to I2S_TXD valid S8 I2S_TX_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 Min. 1.71 40 45% ...
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... Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 2, 12/2012 S10 Min. 1.71 80 45% 5.8 2 — — — S6 S10 S8 Max. Unit 3.6 V — ns 55% MCLK period — ns — 20.6 — ns — ns — Freescale Semiconductor, Inc. ...
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... I2S_RX_FS output invalid S7 I2S_TX_BCLK to I2S_TXD valid S8 I2S_TX_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_RX_FS input setup before I2S_RX_BCLK S10 I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 Min. 1.71 62.5 45% ...
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... Applies to first bit in each frame and only if the TCR4[FSE] bit is clear K20 Sub-Family Data Sheet, Rev. 2, 12/2012 S10 Min. 1.71 250 45 — — S6 S10 S8 Max. Unit 3.6 V — ns 55% MCLK period — ns — — ns — ns — Freescale Semiconductor, Inc. ...
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... MaxSens Maximum sensitivity Res Resolution T Response time @ 20 pF Con20 I Current added in run mode TSI_RUN I Low power mode current adder TSI_LP K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 Min. Typ. 1.71 — — ...
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... If you want the drawing for this package 121-pin MAPBGA 8 Pinout K20 Sub-Family Data Sheet, Rev. 2, 12/2012 )/( NSCN) ref ext ref = 16 μA (REFCHRG = 7), C ref = 32 μA (REFCHRG = 15), C ref www.freescale.com and perform a keyword search for Then use this document number 98ASA00344D = 1.0 pF ref = 0.5 pF ref Freescale Semiconductor, Inc. ...
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... PGA1_DM/ PGA1_DM/ ADC1_DM0/ ADC1_DM0/ ADC1_DM0/ ADC0_DM3 ADC0_DM3 ADC0_DM3 F5 VDDA VDDA VDDA G5 VREFH VREFH VREFH K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 PTE1/ SPI1_SOUT UART1_RX SDHC0_D0 LLWU_P0 PTE2/ SPI1_SCK UART1_CTS_b SDHC0_DCLK LLWU_P1 ...
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... PTA4/ FTM0_CH1 LLWU_P3 PTA5 USB_CLKIN FTM0_CH2 PTA10 FTM2_CH0 PTA11 FTM2_CH1 ALT5 ALT6 ALT7 EzPort EWM_OUT_b EWM_IN RTC_CLKOUT USB_CLKIN JTAG_TCLK/ EZP_CLK SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_TX_BCLK JTAG_TRST_b FTM2_QD_ TRACE_D0 PHA FTM2_QD_ PHB Freescale Semiconductor, Inc. ...
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... TSI0_CH11 TSI0_CH11 C9 PTB19 TSI0_CH12 TSI0_CH12 F10 PTB20 DISABLED F9 PTB21 DISABLED F8 PTB22 DISABLED E8 PTB23 DISABLED K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA12 CAN0_TX FTM1_CH0 PTA13/ CAN0_RX FTM1_CH1 LLWU_P4 PTA14 SPI0_PCS0 UART0_TX PTA15 SPI0_SCK UART0_RX PTA16 ...
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... FB_AD13 I2S0_TXD0 FB_AD12 I2S0_TX_FS CLKOUT I2S0_TX_BCLK FB_AD11 CMP1_OUT FB_AD10 CMP0_OUT I2S0_MCLK FB_AD8 FB_AD7 FTM2_FLT0 FB_AD5 FB_RW_b FB_AD27 FB_AD26 FB_AD25 FB_AD24 FB_CS5_b/ FB_TSIZ1/ FB_BE23_16_b FB_CS4_b/ FB_TSIZ0/ FB_BE31_24_b FB_TBST_b/ FB_CS2_b/ FB_BE15_8_b FB_CS3_b/ FB_TA_b FB_BE7_0_b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 Freescale Semiconductor, Inc. ...
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... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K20 Sub-Family Data Sheet, Rev. 2, 12/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...
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... PTD9 PTD8 NC A PTC0 PTB16 NC B PTB19 PTB11 NC C PTB18 PTB10 PTB8 D PTB17 PTB9 PTB7 E PTB21 PTB20 PTB6 F PTB0/ PTB2 PTB1 G LLWU_P5 PTA3 PTA17 PTA29 H PTA10 PTA16 RESET_b J PTA14 VSS PTA19 K PTA15 VDD PTA18 Freescale Semiconductor, Inc. ...
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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...