XRT91L31ES Exar, XRT91L31ES Datasheet - Page 21

• Manufacturer Part Number: XRT91L31ES
• Description: Bus Transceivers
• Manufacturer: Exar

Specifications of XRT91L31ES

• Product Category: Bus Transceivers
• Rohs: yes

REV. 1.0.2
The 8-bit Single-Ended LVTTL running at 77.76 Mbps (STS-12/STM-4) or 19.44 Mbps (STS-3/STM-1) parallel
data output of the receive path is used to interface to a SONET Framer/ASIC synchronized to the recovered
clock. A simplified block diagram is shown in
F
The parallel receiver outputs are automatically pulled "Low" or forced to a logic state of "0" during a LOS
condition (DLOOP or ALOOP not activated) to prevent data chattering unless LOS detection is disabled by
asserting DLOSDIS and keeping LOSEXT input pin "high." In addition, the user can also assert LOSEXT input
pin from the optical module to force an LOS and mute the parallel receiver outputs as well when DLOSDIS is
not enabled (LOW), see
2.8
2.9
IGURE
9. R
Receive Parallel Output Interface
Disable Parallel Receive Data Output Upon LOS
ECEIVE
P
ARALLEL
Figure
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
O
UTPUT
7).
SONET Framer/ASIC
I
NTERFACE
Figure
B
LOCK
8
9.
21
RXDO[7:0]
RXPCLKO
STS-12/STM-4
STS-3/STM-1
Transceiver
XRT91L31
or
XRT91L31