MAX5825BAUP+ Maxim Integrated, MAX5825BAUP+ Datasheet - Page 22

• Manufacturer Part Number: MAX5825BAUP+
• Description: Digital to Analog Converters - DAC 12-Bit 8Ch V DAC w/I2C Interface
• Manufacturer: Maxim Integrated

Specifications of MAX5825BAUP+

• Rohs: yes
• Number Of Dac Outputs: 8
• Resolution: 12 bit
• Interface Type: I2C
• Settling Time: 4.5 us
• Maximum Operating Temperature: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 1084 mW
• Supply Current: 250 uA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

Figure 8. Typical I
START pair or Repeated START condition required, fol-
lowed by the readback transfer with R/W = 1 to indicate
a read and an acknowledge clock from the MAX5823/
MAX5824/MAX5825. The master still has control of the
SCL line but the MAX5823/MAX5824/MAX5825 take over
the SDA line. The final three bytes in the frame contain
the command and register data written in the first transfer
Maxim Integrated
Output DACs with Internal Reference and I
+5V
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
2
C Application Circuit
SDA
µC
SCL
SCL
SDA
ADDR0
ADDR1
SCL
SDA
ADDR0
ADDR1
MAX5823
MAX5824
MAX5825
MAX5823
MAX5824
MAX5825
MAX5823/MAX5824/MAX5825
presented for readback, followed by a STOP condition. If
additional bytes beyond those required to readback the
requested data are provided, the MAX5823/MAX5824/
MAX5825 will continue to readback ones.
It is not necessary for the write and read mode transfers
to occur immediately in sequence. I
ing other devices do not impact the MAX5823/MAX5824/
MAX5825 readback mode. Toggling between readback
modes is based on the length of the preceding write
mode transfer. Combined format I
is resumed if a write command greater than two bytes
but less than four bytes is supplied. For commands writ-
ten using multiple register write sequences, only the last
command executed is read back. For each command
written, the readback sequence can only be completed
one time; partial and/or multiple attempts to readback
executed in succession will not yield usable data.
The MAX5823/MAX5824/MAX5825 are fully compatible
with existing I
ance inputs; SDA has an open drain which pulls the data
line low to transmit data or ACK pulses.
typical I
This section lists the user-accessible commands and
registers for the MAX5823/MAX5824/MAX5825.
Table 4
Registers.
provides detailed information about the Command
2
C application.
2
C systems. SCL and SDA are high-imped-
I
2
C User-Command Register Map
2
C Interface
2
C readback operation
I
2
C Compatibility
2
C transfers involv-
Figure 8
shows a
22