MAX548AEPA Maxim Integrated, MAX548AEPA Datasheet - Page 12

• Manufacturer Part Number: MAX548AEPA
• Description: Digital to Analog Converters - DAC
• Manufacturer: Maxim Integrated

Specifications of MAX548AEPA

• Number Of Converters: 2
• Number Of Dac Outputs: 2
• Resolution: 8 bit
• Interface Type: QSPI, SPI, Serial (3-Wire, 4-Wire, Microwire)
• Settling Time: 4 us
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP N
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.5 V
• Voltage Reference: External

+2.5V to +5.5V, Low-Power, Single/Dual,
8-Bit Voltage-Output DACs in µMAX Package
Table 4. MAX550A Serial-Interface Programming Commands
X = Don’t care
Table 5. Example Input Word
X = Don’t care
12
UB1
Loaded First
UB1
UNASSIGNED COMMANDS
COMMANDS LOADING INPUT REGISTER ONLY
COMMANDS LOADING DAC REGISTER
COMMANDS UTILIZING THE ASYNCHRONOUS LOAD FUNCTION
COMMAND POWERING DOWN AND LOADING INPUT REGISTER ONLY
COMMANDS POWERING DOWN AND UPDATING DAC REGISTER
COMMAND POWERING DOWN AND UTILIZING THE ASYNCHRONOUS LOAD FUNCTION
X
X
X
X
X
X
X
X
X
X
X
X
X
X
______________________________________________________________________________________
UB2
UB2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
UB3
CONTROL BYTE
X
X
X
X
X
X
X
X
X
X
X
X
X
UB3
Loaded First
X
C2
CONTROL BYTE
0
1
0
0
0
0
0
0
0
1
1
1
1
C2
0
C1
0
X
0
1
1
1
1
1
1
0
1
1
1
C0
C1
X
X
X
0
0
1
1
1
1
X
0
1
1
1
A1
X
X
X
X
X
X
X
X
X
X
X
X
X
C0
0
A0
0
0
1
0
1
0
1
0
1
1
1
1
1
A1
8-Bit DAC Data
8-Bit DAC Data
8-Bit DAC Data
8-Bit DAC Data
8-Bit DAC Data
8-Bit DAC Data
8-Bit DAC Data
8-Bit DAC Data
0
Loaded Last
DATA BYTE
D7........D0
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
A0
1
D7
1
LDAC
Pin 6
X
X
X
X
X
0
0
1
1
X
X
0
1
D6
0
Unassigned command
Unassigned operation
Load DAC input register. DAC register unchanged.
Update DAC register with current contents of
input register. Input register unchanged.
Load DAC input register and update DAC register.
Update DAC register with current contents of
input register. Input register unchanged.
Load DAC input register and update DAC register.
After CS’s rising edge and on LDAC’s falling
edge, update DAC register with current contents
of input register. Input register unchanged.
Load DAC input register. After CS’s rising edge
and on LDAC’s falling edge, update DAC register.
Load DAC input register and power down DAC.
Load DAC input register, power down DAC, and
update DAC register.
Load DAC input register, power down DAC, and
update DAC register.
Load DAC input register and power down DAC.
While powered down, on LDAC’s falling edge,
update DAC register.
(Commands executed on CS’s rising edge)
D5
0
DATA BYTE
D4
0
COMMAND
D3
0
D2
0
Loaded Last
D1
0
D0
0