MAX5886EVKIT Maxim Integrated, MAX5886EVKIT Datasheet - Page 3

• Manufacturer Part Number: MAX5886EVKIT
• Description: Digital to Analog Converters - DAC Evaluation Kit for the MAX5886 MAX5887 MAX5888
• Manufacturer: Maxim Integrated

Specifications of MAX5886EVKIT

• Number Of Converters: 1
• Conversion Rate: 500 MSPs
• Resolution: 12 bit
• Interface Type: Parallel
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V

The MAX5886/MAX5887/MAX5888 EV kits are
designed to simplify the evaluation of the MAX5886
(12-bit), MAX5887 (14-bit), or MAX5888 (16-bit),
500Msps, current-output DACs. The DACs require
LVDS-compatible data inputs, differential clock input
signals, a 1.2V reference voltage, and 3.3V power sup-
plies for simple board operation.
The EV kits provide header connectors to easily inter-
face with an LVDS pattern generator, circuitry to con-
vert the differential current outputs to a single-ended
voltage signal, and circuitry to convert a user-supplied
single-ended clock signal to a differential clock signal
required by the DAC. The EV kit circuit includes differ-
ent options for supplying a reference voltage to the
DAC. The EV kit circuit can operate with a single 3.3V
power supply, but also supports the use of three sepa-
rate 3.3V power supplies by dividing the circuit
grounds into digital, analog, and digital clock ground
planes that improve dynamic performance. The three
ground planes are connected together on the back of
the PC board.
The EV kits can operate from a single 3.3V power supply
connected to the VDD_CK, DVDD, AVDD input power
pads and their respective ground pads for simple board
operation. However, three separate 3.3V power supplies
are recommended for optimum dynamic performance.
The EV kit PC board layout is divided into three sections:
digital, analog, and clock. Using separate power supplies
for each section reduces crosstalk and improves the out-
put signal integrity. When using separate power supplies,
connect each power supply across the DVDD and DGND
PC board pads (digital), across the VDD_CK and
GND_CK PC board pads (clock), and across the AVDD
and AGND PC board pads (analog) on the EV kit.
These EV kits provide two 0.1in 2 x 20 header connec-
tors (J1 and J2) to allow interface of a 12-bit, 14-bit, or
16-bit LVDS pattern generator. The header data pins
are labeled on the board with the appropriate data bit
designation. Use the labels on the EV kit to match the
data bits from the LVDS pattern generator to the corre-
sponding data pins on J1 and J2. The positive rail of a
bit is labeled BxP (positive) and the complementary rail
is labeled BxN (negative) where x is the bit number.
MAX5886/MAX5887/MAX5888 Evaluation Kits
_______________________________________________________________________________________
Detailed Description
LVDS Input Data
Power Supplies
The DAC requires a differential clock input signal with
minimal jitter. The EV kit circuit provides single-ended to
differential conversion circuitry. The user must supply a
single-ended clock signal at the CLK SMA connector.
The clock signal can be either a sine wave or a square
wave. For a sine wave, 2V
recommended and for a square wave greater than a
0.5V
The DAC requires a reference voltage to set the full-
scale analog signal voltage output. The EV kit features
three ways to provide a reference voltage to the DAC:
internal, on-board external, and user-supplied external
reference.
Verify that no shunt is connected across jumper JU1 to
use the internal 1.2V bandgap reference. The reference
voltage can be measured at the VREF pad on the EV
kit. The internal reference can be overdriven by an
external reference to enhance accuracy and drift per-
formance or for gain control. The EV kit circuit is
designed with an on-board 1.25V temperature-stable
external voltage reference source U2 (MAX6161) that
can be used to overdrive the internal reference provid-
ed by the DAC. Install shunts across jumpers JU1 and
JU2 to use the on-board external reference. The user
can also supply an external voltage reference in the
range of 0.125V to 1.25V by connecting a voltage
source to the VREF pad and removing the shunts
across jumpers JU1 and JU2. See Table 1 to configure
the shunts across jumpers JU1 and JU2 and select the
source of the reference voltage.
Table 1. Reference Voltage Selection
SHUNT POSITIONS
JU1 AND JU2
P-P
Not installed
Not installed
Installed
signal is recommended.
Reference Voltage Options
External 1.25V reference (U2)
connected to REFIO pin
DAC internal 1.2V bandgap reference
User-supplied voltage reference at the
VREF pad (0.125V to 1.25V)
VOLTAGE REFERENCE MODE
P-P
(+10dBm) amplitude is
Clock Signal
3