AT24C04C-MAHM-T Atmel, AT24C04C-MAHM-T Datasheet - Page 7

• Manufacturer Part Number: AT24C04C-MAHM-T
• Description: EEPROM 4K (512x8) 2-WIRE NiPdAu, 1.7V
• Manufacturer: Atmel

Specifications of AT24C04C-MAHM-T

• Rohs: yes
• Factory Pack Quantity: 5000

5.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in eight bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
Standby Mode: The Atmel AT24C04/08C features a low-power standby mode which is enabled:
2-wire Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by
following these steps:
The device is ready for next communication after above steps have been completed.
Figure 5-1. Software Reset


1.
2.
3.
SDA
SCL
Upon power-up
After the receipt of the Stop bit and the completion of any internal operations
Create a start bit condition
Clock nine cycles
Create another start bit followed by stop bit condition as shown below.
Figure 5-5 on page
Start
Bit
1
9).
Figure 5-4 on page
2
Dummy Clock Cycles
3
Figure 5-5 on page
9). Data changes during SCL high periods will indicate
Atmel AT24C04C/08C [DATASHEET]
8
9).
9
Start
8787C–SEEPR–7/12
Bit
Stop
Bit
7