AT24C08C-MAHM-T Atmel, AT24C08C-MAHM-T Datasheet - Page 11

• Manufacturer Part Number: AT24C08C-MAHM-T
• Description: EEPROM 8K (1024x8) 2-WIRE NiPdAu, 1.7V
• Manufacturer: Atmel

Specifications of AT24C08C-MAHM-T

• Rohs: yes
• Factory Pack Quantity: 5000

8.
Read Operations
Read operations are initiated in the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are three read operations: Current Address Read, Random Address Read, and
Sequential
Current Address Read: The internal data word address counter maintains the last address accessed during the last
read or write operation, incremented by one. This address stays valid between operations as long as the chip power is
maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first
page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The microcontroller does not respond with an input zero but does
generate a following stop condition (see
Random Read: A random read requires a “dummy” byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must
generate another start condition. The microcontroller now initiates a Current Address Read by sending a device address
with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word.
The microcontroller does not respond with a zero but does generate a following stop condition (see
12).
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After
the microcontroller receives a data word, it responds with an Acknowledge. As long as the EEPROM receives an
Acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will “roll over” and the Sequential Read will continue. The
Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a
following Stop condition (see
Figure 8-1. Device Address
Figure 8-2. Byte Write
Density
4K
8K
SDA LINE
Read.
S
R
T
A
T
Access Area
EEPROM
EEPROM
M
S
B
Address
Device
Figure 8-6 on page
W
W
R
R
T
E
/
I
C
A
K
Word Address
Bit 7
MSB
Figure 8-4 on page
1
1
12).
Bit 6
0
0
C
K
A
Bit 5
12).
1
1
Data
Bit 4
Atmel AT24C04C/08C [DATASHEET]
0
0
A
C
K
O
S
T
P
Bit 3
A
A
2
2
Bit 2
P1
A
1
8787C–SEEPR–7/12
Figure 8-5 on page
Bit 1
P0
P0
Bit 0
R/W
R/W
LSB
11