LFE3-95EA-9FN484C Lattice, LFE3-95EA-9FN484C Datasheet - Page 97
LFE3-95EA-9FN484C
Manufacturer Part Number
LFE3-95EA-9FN484C
Description
FPGA - Field Programmable Gate Array 92K LUTs 133 I/O 1.2V -9 SPEED
Manufacturer
Lattice
Datasheet
1.LFE3-95EA-7LFN672I.pdf
(141 pages)
Specifications of LFE3-95EA-9FN484C
Rohs
yes
Number Of Gates
92 K
Number Of Logic Blocks
240
Embedded Block Ram - Ebr
4420 Kbit
Number Of I/os
133
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
FPBGA-484
Distributed Ram
188 Kbit
Minimum Operating Temperature
0 C
Operating Supply Current
230.7 mA
Factory Pack Quantity
60
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE3-95EA-9FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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PCI Express Electrical and Timing Characteristics
AC and DC Characteristics
Transmit
UI
V
V
V
V
V
I
Z
RL
RL
T
T
L
T
T
Receive
UI
V
V
V
Z
Z
Z
RL
RL
T
1. Values are measured at 2.5 Gbps.
2. Measured with external AC-coupling on the receiver.
3.Not in compliance with PCI Express 1.1 standard.
TX-SHORT
TX-SKEW
TX-DIFF_P-P
TX-DE-RATIO
TX-CM-AC_P
TX-RCV-DETECT
TX-DC-CM
TX-DIFF-DC
TX-RISE
TX-FALL
TX-EYE
TX-EYE-MEDIAN-TO-MAX-JITTER
RX-DIFF_P-P
RX-IDLE-DET-DIFF_P-P
RX-CM-AC_P
RX-DIFF-DC
RX-DC
RX-HIGH-IMP-DC
RX-IDLE-DET-DIFF-ENTERTIME
TX-DIFF
TX-CM
RX-DIFF
RX-CM
1, 2
1
Symbol
Unit interval
Differential peak-to-peak output voltage
De-emphasis differential output voltage
ratio
RMS AC peak common-mode output
voltage
Amount of voltage change allowed dur-
ing receiver detection
Tx DC common mode voltage
Output short circuit current
Differential output impedance
Differential return loss
Common mode return loss
Tx output rise time
Tx output fall time
Lane-to-lane static output skew for all
lanes in port/link
Transmitter eye width
Maximum time between jitter median
and maximum deviation from median
Unit Interval
Differential peak-to-peak input voltage
Idle detect threshold voltage
Receiver common mode voltage for AC
coupling
DC differential input impedance
DC input impedance
Power-down DC input impedance
Differential return loss
Common mode return loss
Maximum time required for receiver to
recognize and signal an unexpected idle
on link
Over Recommended Operating Conditions
Description
3-44
Test Conditions
V
V
20 to 80%
20 to 80%
TX-D+
TX-D-
DC and Switching Characteristics
=0.0V
=0.0V
LatticeECP3 Family Data Sheet
399.88
399.88
0.125
0.125
0.34
200K
0.75
Min
0.8
6.0
6.0
80
10
65
80
40
10
—
—
—
—
—
—
—
-3
0
3
Typ
400
-3.5
100
400
100
1.0
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
CCOB
400.12
400.12
0.125
340
Max
600
120
150
120
1.2
1.3
1.2
20
90
60
—
—
—
—
—
—
—
—
—
-4
+ 5%
3
Ohms
Ohms
Ohms
Ohms
Units
mV
mV
mA
mV
mV
ms
dB
dB
dB
dB
dB
ps
ns
ps
UI
UI
UI
UI
V
V
V
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