PCI-MT32-XP-N2 Lattice, PCI-MT32-XP-N2 Datasheet - Page 169

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PCI-MT32-XP-N2

Manufacturer Part Number
PCI-MT32-XP-N2
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet

Specifications of PCI-MT32-XP-N2

Factory Pack Quantity
1
Lattice Semiconductor
Table B-5. PCI Pins Assignments (Continued)
Table B-6. PCI Pins Assignments
IPUG18_09.2, November 2010
PCI Pin Assignments for Target 33MHz 32-Bit Bus
The PCI Target 33MHz 32-bit core is optimized for LFXP10-4F388C. An example pin assignment, optimized for
best performance, is given in Table 63. Refer to the readme file included with the core package for further informa-
tion.
PCI System Pins
PCI Address and Data
Signal Name
PCI Interface Controls
PCI Interrupts
Signal Name
ad[0]
rstn
devseln
cben[0]
cben[1]
cben[2]
cben[3]
framen
clk
ad[18]
ad[19]
ad[20]
ad[21]
ad[22]
ad[23]
ad[24]
ad[25]
ad[26]
ad[27]
ad[28]
ad[29]
ad[30]
ad[31]
perrn
stopn
serrn
trdyn
irdyn
intan
gntn
reqn
idsel
par
Pin/Bank
AB18/4
AA4/5
Pin/Bank
U1/6
AA19/4
AB10/5
AB11/5
AA11/5
AA12/4
AB12/4
AB19/4
W14/4
W15/4
W11/5
W10/5
AB8/5
AA8/5
AB7/5
AA7/5
AB6/5
AA6/5
AB5/5
AA5/5
AB4/5
AB9/5
Y10/5
Y20/4
Y11/5
Y12/5
W9/5
W6/5
Y8/5
Y7/5
Y9/5
169
LVCMOS33_IN
Buffer Type
PCI33_BIDI
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
BufferType
PCI33_IN
PCI33_IN
Pin Assignments For Lattice FPGAs
PCI IP Core User’s Guide

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