MAX13035EETE+ Maxim Integrated Products, MAX13035EETE+ Datasheet - Page 8
![IC TRANSL LOGIC 16-TQFN](/photos/6/66/66625/16-tqfn_exp_pad_21-0136_sml.jpg)
MAX13035EETE+
Manufacturer Part Number
MAX13035EETE+
Description
IC TRANSL LOGIC 16-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX13030EEBET.pdf
(18 pages)
Specifications of MAX13035EETE+
Logic Function
Translator, Bidirectional
Number Of Bits
1
Input Type
Logic
Output Type
Logic
Data Rate
100Mbps
Number Of Channels
6
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
6.5ns
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TQFN Exposed Pad
Supply Voltage
2.2 V ~ 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6-Channel High-Speed Logic-Level Translators
8
MAX13030E–MAX13034E
_______________________________________________________________________________________
UCSP
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
—
—
—
—
TQFN
EP
10
16
13
11
15
14
12
—
—
—
4
6
7
9
3
5
8
2
1
PIN
UCSP
A1
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
D1
D2
C4
D3
D4
—
—
—
—
MAX13035E
TQFN
EP
10
16
13
15
11
14
12
—
—
—
4
6
7
9
3
5
8
2
1
CLK_RET
CLK_V
I/O V
I/O V
I/O V
I/O V
I/O V
I/O V
CLK_V
I/O V
I/O V
I/O V
I/O V
I/O V
I/O V
NAME
GND
V
EN
EP
V
CC
L
CC
CC
CC
CC
CC
CC
L
L
L
L
L
L
CC
3
4
2
5
1
6
L
3
4
2
5
1
6
Input/Output 3. Referenced to V
Input/Output 3. Referenced to V
Input/Output 4. Referenced to V
Input/Output 4. Referenced to V
Input/Output 2. Referenced to V
Input/Output 2. Referenced to V
Input/Output 5. Referenced to V
Input/Output 5. Referenced to V
Logic-Supply Voltage, +1.62V to +3.2V. Bypass V
a 0.1µF capacitor placed as close as possible to the device.
Power-Supply Voltage, +2.2V to +3.6V. Bypass V
a 0.1µF ceramic capacitor. For full ESD protection, connect a
1µF ceramic capacitor from V
the V
Ground
Enable Input. Drive EN to GND for shutdown mode, or drive EN to
V
Input/Output 1. Referenced to V
Input/Output 1. Referenced to V
Input/Output 6. Referenced to V
Input/Output 6. Referenced to V
Clock Return Output. CLK_RET is the returned signal of a clock
applied to CLK_V
Translator Channel for a Clock Applied to V
Translator Channel for a Clock Applied to V
Exposed Paddle. Connect exposed paddle to GND.
L
or V
CC
CC
input.
for normal operation.
L
. CLK_RET is referenced to V
FUNCTION
CC
L
CC
CC
L
L
CC
CC
L
L
CC
CC
L
.
.
.
.
.
.
to GND as close as possible to
.
.
.
.
.
.
Pin Description
CC
L
L
.
CC
L
to GND with
to GND with