MC10EP90DTR2 ON Semiconductor, MC10EP90DTR2 Datasheet

MC10EP90DTR2

Manufacturer Part Number

MC10EP90DTR2

Description

IC XLATOR TRPL ECL-PECL 20TSSOP

Manufacturer

ON Semiconductor

Series

10EPr

Datasheet

1.MC100EP90DTR2.pdf (9 pages)

Specifications of MC10EP90DTR2

Logic Function

Translator

Number Of Bits

Input Type

ECL

Output Type

LVPECL, PECL

Number Of Channels

Number Of Outputs/channel

Differential - Input:output

Yes/Yes

Propagation Delay (max)

0.34ns

Voltage - Supply

3 V ~ 5.5 V

Operating Temperature

-40°C ~ 85°C

Package / Case

20-TSSOP

Supply Voltage

3 V ~ 5.5 V

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Data Rate

Other names

MC10EP90DTR2OSTR

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MC10EP90, MC100EP90

−3.3V / −5V Triple ECL Input

to LVPECL/PECL Output

Translator

Description

translator. The device receives differential LVECL or ECL signals and

translates them to differential LVPECL or PECL output signals.

or ECL signals at the input. If a Single−Ended input is to be used the

then drive the D input. When used the V

to ground by a 0.01 mF capacitor. The V

the switching reference for the EP90 under Single−Ended input

switching conditions, as a result this pin can only source/sink up to

0.5 mA of current.

rails. The V

the V

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

November, 2006 − Rev. 6

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC10/100EP90 is a TRIPLE ECL TO LVPECL/PECL

A V

To accomplish the level translation the EP90 requires three power

The 100 Series contains temperature compensation.

GND = 0 V

260 ps Typical Propagation Delay

Maximum Frequency > 3 GHz Typical

Voltage Supplies V

Open Input Default State

Safety Clamp on Inputs

Fully Differential Design

Q Output Will Default LOW with Inputs Open or at V

These are Pb−Free Devices*

output should be connected to the D input. The active signal would

Output

connected to the negative supply.

output is provided for interfacing with Single−Ended LVECL

supply should be connected to the positive supply, and

= 3.0 V to 5.5 V, V

output is designed to act as

output should be bypassed

= −3.0 V to −5.5 V,

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

*For additional marking information, refer to

Application Note AND8002/D.

xxxx

(Note: Microdot may be in either location)

ORDERING INFORMATION

MARKING DIAGRAM*

= MC10 or 100

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

http://onsemi.com

CASE 948E

DT SUFFIX

TSSOP−20

ALYWG

EP90

xxxx

Publication Order Number:

MC10EP90/D

Related parts for MC10EP90DTR2

MC10EP90DTR2 Summary of contents

Page 1

... V Output BB • These are Pb−Free Devices* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 6 output should be bypassed BB output is designed to act − ...

Page 2

GND LVPECL/ LVPECL/ PECL PECL ECL ECL Warning: All and GND ...

Page 3

Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...

Page 4

Table 5. 10EP DC CHARACTERISTICS Symbol Characteristic I Negative Power Supply Current EE I Positive Power Supply Current CC V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended ...

Page 5

Table 7. 100EP DC CHARACTERISTICS Symbol Characteristic I Negative Power Supply Current EE I Positive Power Supply Current CC V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended ...

Page 6

Table 9. AC CHARACTERISTICS V Symbol Characteristic f Maximum Frequency max (See Figure 2 F /JITTER) max t , Propagation Delay to PLH t Output Differential PHL t Duty Cycle Skew (Note 15) SKEW Within Device Skew Device to Device ...

Page 7

... Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC10EP90DT MC10EP90DTG MC10EP90DTR2 MC10EP90DTR2G MC100EP90DT MC100EP90DTG MC100EP90DTR2 MC100EP90DTR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...

Page 8

... −V− 0.100 (0.004) −T− SEATING PLANE 16X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−20 CASE 948E−02 ISSUE Í Í Í Í ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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