LCMXO2-256HC-4SG32IES Lattice, LCMXO2-256HC-4SG32IES Datasheet - Page 18

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LCMXO2-256HC-4SG32IES

Manufacturer Part Number
LCMXO2-256HC-4SG32IES
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 3.3V engineering sample
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-256HC-4SG32IES

Rohs
yes
Maximum Operating Frequency
269 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 40 C
Figure 2-11. Group of Four Programmable I/O Cells
Notes:
1. Input gearbox is available only in PIC on the bottom edge of MachXO2-640U, MachXO2-1200/U and larger devices.
2. Output gearbox is available only in PIC on the top edge of MachXO2-640U, MachXO2-1200/U and larger devices.
Core Logic/
Routing
1 PIC
Gearbox
Input
Gearbox
Output
2-14
Register Block
Register Block
Register Block
Register Block
Register Block
Register Block
Register Block
Register Block
Input Register
Input Register
Input Register
Input Register
& Tristate
& Tristate
& Tristate
& Tristate
Output
Output
Output
Output
Block
Block
Block
Block
PIO A
PIO B
PIO C
PIO D
MachXO2 Family Data Sheet
Pin
Pin
Pin
Pin
A
B
C
D
Architecture

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