SY55857LKI Micrel Inc, SY55857LKI Datasheet - Page 5

IC TRANSLATOR DUAL LVPECL 10MSOP

SY55857LKI

Manufacturer Part Number
SY55857LKI
Description
IC TRANSLATOR DUAL LVPECL 10MSOP
Manufacturer
Micrel Inc
Series
SY55r
Datasheet

Specifications of SY55857LKI

Logic Function
Translator
Number Of Bits
2
Input Type
CML, CMOS, HSTL, LVDS, TTL
Output Type
LVPECL
Data Rate
2.5Gbps
Number Of Channels
2
Number Of Outputs/channel
1
Differential - Input:output
Yes/Yes
Propagation Delay (max)
0.4ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Supply Voltage
3 V ~ 3.6 V
Logic Family
ECL
Logical Function
Translator
Technology
ECL
High Level Output Current
-50mA
Low Level Output Current
50mA
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Abs. Propagation Delay Time
400ps
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SY55857LKI
Manufacturer:
MICREL
Quantity:
1 880
Micrel, Inc.
Establishing Static Logic Inputs
complement inputs to ground, but not both. A logic zero is
achieved by connecting the complement input to ground
with the true input floating. For a TTL input, tie a 2.5k
resistor between the complement input and ground. See
“Input Interface” section.
Input Levels
connected directly to the D inputs. Depending on the actual
worst case voltage seen, performance of SY55857L varies
as per the following table:
M9999-082306
hbwhelp@micrel.com or (408) 955-1690
FUNCTIONAL DESCRIPTION
Do not leave unused inputs floating. Tie either the true or
LVDS, CML and HSTL differential signals may be
Input Voltage
0 to V
0 to 2.4V
Range
CC
+0.3
Table 1. Input Voltage Swings
Voltage Swing
Minimum
100mV
200mV
Translation Speed
Maximum
1.25Gbps
2.5Gbps
5
supported. Due to the current required by the input structure
shown in Figure 2, mutli-drop and multi-point architectures
are not supported.
For LVDS applications, only point-to-point interfaces are
Figure 2. Simplified Input Structure
/D
D
IN
IN
1.05k
1.05k
R1
R1
1.5k
R2
GND
V
CC
R2
1.5k
SuperLite™
SY55857L

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