1893BFILFT IDT, 1893BFILFT Datasheet - Page 115

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1893BFILFT

Manufacturer Part Number
1893BFILFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet

Specifications of 1893BFILFT

Rohs
yes
Part # Aliases
ICS1893BFILFT
9.5.6 100M/MII Media Independent Interface: Synchronous Receive Timing
ICS1893BF, Rev. F, 5/13/10
RXCLK
RXD[3:0]
RXDV
RXER
Table 9-13
The time periods consist of timings of signals on the following pins:
Figure 9-7
Table 9-13. MII Interface: Synchronous Receive Timing
Figure 9-7. MII Interface Synchronous Receive Timing Diagram
Period
Time
RXCLK
RXD[3:0]
RXDV
RXER
t1
t2
ICS1893BF Data Sheet Rev. F - Release
RXD[3:0], RXDV, and RXER Setup to RXCLK Rise
RXD[3:0], RXDV, and RXER Hold after RXCLK Rise
shows the timing diagram for the time periods.
lists the significant time periods for the MII / 100M Stream Interface synchronous receive timing.
Parameter
t1
Copyright © 2009, IDT, Inc.
All rights reserved.
115
t2
Chapter 9 DC and AC Operating Conditions
Min.
10.0
10.0
Typ.
Max.
May, 2010
Units
ns
ns

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