1894K-43LF IDT, 1894K-43LF Datasheet - Page 42

• Manufacturer Part Number: 1894K-43LF
• Description: Ethernet ICs 3.3V 10/100 PHY RMII
• Manufacturer: IDT

Specifications of 1894K-43LF

• Rohs: yes
• Part # Aliases: ICS1894K-43LF

100M MII Media Independent Interface: Receive Latency
100M MII/100M Stream Interface: Receive Latency Timing Diagram
Reset: Power-On Reset
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
TP_RX
RXCLK
RXD
†
unscrambled.
Shown
The table below lists the significant time periods for the 100M MII/100M Stream Interface receive latency. The time
periods consist of timings of signals on the following pins:
•
•
•
The 100M MII/100M Stream Interface: Receive Latency Timing Diagram shows the timing diagram for the time
periods.
The table below lists the significant time periods for the power-on reset. The time periods consist of timings of
signals on the following pins:
•
•
The Power-On Reset Timing Diagram shows the timing diagram for the time periods.
Period
Period
Time
†
Time
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
VDD
TXCLK
t1
t1
VDD ≥ 2.7 V to Reset Complete
First Bit of /J/ into TP_RX to /J/ on RXD
Parameter
Parameter
t1
Conditions
100M MII
Conditions
–
42
Min.
40
Min. Typ. Max.
–
Typ.
45
16
ICS1894-32
Max. Units
500
17
Bit times
PHYCEIVER
ms
Units
REV M 021512