AT25DL081-MHN-T Adesto Technologies, AT25DL081-MHN-T Datasheet - Page 37

• Manufacturer Part Number: AT25DL081-MHN-T
• Description: Flash 8M 1.65-1.95V 100Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT25DL081-MHN-T

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 8 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 1.95 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Current: 20 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: UDFN-8

11.1.2 EPE Bit
11.1.3 WPP Bit
11.1.4 SWP Bits
11.1.5 WEL Bit
The EPE bit indicates whether the last erase or program operation completed successfully or not. If at least one byte
during the erase or program operation did not erase or program properly, then the EPE bit will be set to the Logical 1
state. The EPE bit will not be set if an erase or program operation aborts for any reason, such as an attempt to erase or
program a protected region, or a locked down sector, an attempt to erase or program a suspended sector, or if the WEL
bit is not set prior to an erase or program operation. The EPE bit is updated after every erase and program operation.
The WPP bit can be read to determine if the WP pin has been asserted or not.
The SWP bits provide feedback on the software protection status for the device. There are three possible combinations
of the SWP bits that indicate whether none, some, or all of the sectors have been protected using the Protect Sector
command or the Global Protect feature. If the SWP bits indicate that some of the sectors have been protected, then the
individual Sector Protection Registers can be read with the Read Sector Protection Registers command to determine
which sectors are in fact protected.
The WEL bit indicates the current status of the internal Write Enable Latch. When the WEL bit is in the Logical 0 state,
the device will not accept any Byte/Page Program, Erase, Protect Sector, Unprotect Sector, Sector Lockdown, Freeze
Sector Lockdown State, Program OTP Security Register, Write Status Register, or Write Configuration Register
commands. The WEL bit defaults to the Logical 0 state after a device power-up or reset operation. In addition, the WEL
bit will be reset to the Logical 0 state automatically under the following conditions:
If the WEL bit is in the Logical 1 state, it will not be reset to a Logical 0 if an operation aborts due to an incomplete or
unrecognized opcode being clocked into the device before the CS pin is deasserted. In order for the WEL bit to be reset
when an operation aborts prematurely, the entire opcode for a Byte/Page Program, Erase, Protect Sector, Unprotect
Sector, Sector Lockdown, Freeze Sector Lockdown State, Program OTP Security Register, Write Status Register, or
Write Configuration Register command must have been clocked into the device.
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Write Disable operation completes successfully
Write Status Register operation completes successfully or aborts
Write Configuration Register operation completes successfully or aborts
Protect Sector operation completes successfully or aborts
Unprotect Sector operation completes successfully or aborts
Sector Lockdown operation completes successfully or aborts
Freeze Sector Lockdown State operation completes successfully or aborts
Program OTP Security Register operation completes successfully or aborts
Byte/Page Program operation completes successfully or aborts
Block Erase operation completes successfully or aborts
Chip Erase operation completes successfully or aborts
Hold condition aborts
AT25DL081 [DATASHEET]
8732E–DFLASH–1/2013
37