MAX4265ESA-T Maxim Integrated, MAX4265ESA-T Datasheet - Page 13
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MAX4265ESA-T
Manufacturer Part Number
MAX4265ESA-T
Description
High Speed Operational Amplifiers Single-Supply 400MHz w/Enable
Manufacturer
Maxim Integrated
Datasheet
1.MAX4265ESA-T.pdf
(19 pages)
Specifications of MAX4265ESA-T
Number Of Channels
1
Voltage Gain Db
95 dB
Input Offset Voltage
1 mV (Typ) at 5 V
Slew Rate
900 V/us at 5 V
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Package / Case
SOIC-8 Narrow
Common Mode Rejection Ratio (min)
60 dB
Maximum Power Dissipation
471 mW
Minimum Operating Temperature
- 40 C
Supply Voltage - Max
8 V
Supply Voltage - Min
4.5 V
The MAX4265 and MAX4268 are internally compensat-
ed for unity gain. When configured for unity gain, they
require a small resistor (R
path (Figure 1). This resistor improves AC response by
reducing the Q of the tank circuit, which is formed by
parasitic feedback inductance and capacitance.
The values of the gain-setting feedback and input resis-
tors are important design considerations. Large resistor
values will increase voltage noise and interact with the
amplifier’s input and PC board capacitance to generate
undesirable poles and zeros, which can decrease
bandwidth or cause oscillations. For example, a nonin-
verting gain of +2V/V (Figure 1) using R
combined with 2pF of input capacitance and 0.5pF of
board capacitance will cause a feedback pole at
128MHz. If this pole is within the anticipated amplifier
bandwidth, it will jeopardize stability. Reducing the 1kΩ
resistors to 100Ω extends the pole frequency to
1.28GHz, but could limit output swing by adding 200Ω
in parallel with the amplifier’s load. Clearly, the selec-
tion of resistor values must be tailored to the specific
application.
The MAX4265–MAX4270 are ultra-low-distortion, high-
bandwidth op amps. Output distortion will degrade as
the total load resistance seen by the amplifier decreas-
es. To minimize distortion, keep the input and gain-set-
ting resistor values relatively large. A 500Ω feedback
resistor combined with an appropriate input resistor to
set the gain will provide excellent AC performance with-
out significantly increasing distortion.
The amplifier’s input-referred noise-voltage density is
dominated by flicker noise at lower frequencies and by
thermal noise at higher frequencies. Because the ther-
mal noise contribution is affected by the parallel combi-
nation of the feedback resistive network, those resistor
values should be reduced in cases where the system
bandwidth is large and thermal noise is dominant. This
noise-contribution factor decreases, however, with
increasing gain settings. For example, the input noise
voltage density at the op amp input with a gain of
+10V/V using R
18nV/√Hz. The input noise can be reduced to 8nV/√Hz
by choosing R
Inverting and Noninverting Configurations
F
= 1kΩ, R
F
______________________________________________________________________________________
= 100kΩ and R
Choosing Resistor Values
G
F
) in series with the feedback
= 110Ω.
Unity-Gain Configurations
Distortion Considerations
Noise Considerations
G
= 11kΩ is e
F
400MHz Op Amps with Disable
= R
G
= 1kΩ
n
Ultra-Low-Distortion, +5V,
=
The MAX4265–MAX4270 are not designed to drive
highly reactive loads. Stability is maintained with loads
up to 15pF with less than 2dB peaking in the frequency
response. To drive higher capacitive loads, place a
small isolation resistor in series between the amplifier’s
output and the capacitive load (Figure 1). This resistor
improves the amplifier’s phase margin by isolating the
capacitor from the op amp’s output.
To ensure a load capacitance that limits peaking to less
than 2dB, select a resistance value from Figure 2. For
example, if the capacitive load is 100pF, the corre-
sponding isolation resistor is 6Ω (MAX4266/MAX4269).
Figures 3 and 4 show the peaking that occurs in the fre-
quency response with and without an isolation resistor.
Coaxial cable and other transmission lines are easily
driven when terminated at both ends with their charac-
teristic impedance. When driving back-terminated
transmission lines, the capacitive load of the transmis-
sion line is essentially eliminated.
Input buffer amplifiers can be a source of significant
errors in high-speed ADC applications. The input buffer
is usually required to rapidly charge and discharge the
ADC’s input, which is often capacitive (see Driving
Capacitive Loads). In addition, since a high-speed
ADC’s input impedance often changes very rapidly dur-
ing the conversion cycle, measurement accuracy must
Figure 1. Noninverting Configuration
*OPTIONAL, USED TO MINIMIZE PEAKING FOR C
R
V
MAX4265
MAX4266
MAX4267
G
IN
PART
R
R
500
500
F
24
F
(Ω)
Driving Capacitive Loads
MAX4265
MAX4266
MAX4267
R
G
500
125
∞
(Ω)
L
> 15pF.
ADC Input Buffer
R
GAIN (V/V)
S
*
C
+1
+2
+5
L
R
L
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