NB100ELT23LDR2 ON Semiconductor, NB100ELT23LDR2 Datasheet

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NB100ELT23LDR2

Manufacturer Part Number
NB100ELT23LDR2
Description
IC XLATOR DUAL LV PECL-TTL 8SOIC
Manufacturer
ON Semiconductor
Series
100ELTr
Datasheet

Specifications of NB100ELT23LDR2

Logic Function
Translator
Number Of Bits
2
Input Type
LVPECL, LVDS
Output Type
LVTTL
Number Of Channels
2
Number Of Outputs/channel
1
Differential - Input:output
Yes/No
Propagation Delay (max)
2.95ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Supply Voltage
3 V ~ 3.6 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Other names
NB100ELT23LDROSCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NB100ELT23LDR2G
Manufacturer:
ON/安森美
Quantity:
20 000
NB100ELT23L
3.3V Dual Differential
LVPECL/LVDS to LVTTL
Translator
translator. Because LVPECL (Positive ECL) or LVDS levels are used,
only +3.3 V and ground are required. The small outline 8-lead package
and the dual gate design of the ELT23L makes it ideal for applications
which require the translation of a clock and a data signal.
there are no LVPECL outputs or an external V
ELT23L does not require both ECL standard versions. The LVPECL
inputs are differential. Therefore, the NB100ELT23L can accept any
standard differential LVPECL/LVDS input referenced from a V
+3.3 V.
Features
© Semiconductor Components Industries, LLC, 2010
November, 2010 − Rev. 11
The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL
The ELT23L is available in only the ECL 100K standard. Since
2.1 ns Typical Propagation Delay
Maximum Operating Frequency > 160 MHz
24 mA LVTTL Outputs
Operating Range: V
Pb−Free Packages are Available
CC
= 3.0 V to 3.6 V with GND = 0 V
BB
reference, the
1
CC
of
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
Application Note AND8002/D.
1
1
ORDERING INFORMATION
A
L
Y
W
M
G
http://onsemi.com
CASE 506AA
CASE 948R
MN SUFFIX
DT SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
CASE 751
D SUFFIX
TSSOP−8
SOIC−8
DFN8
Publication Order Number:
NB100ELT23L/D
DIAGRAMS*
8
1
MARKING
8
1
1
ALYWG
KT23L
ALYW
K23L
G
G
4

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NB100ELT23LDR2 Summary of contents

Page 1

NB100ELT23L 3.3V Dual Differential LVPECL/LVDS to LVTTL Translator The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the ...

Page 2

LVPECL LVTTL Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack ...

Page 3

Table 3. MAXIMUM RATINGS Symbol Parameter V Power Supply CC V Input Voltage I I Output Current out T Operating Temperature Range A T Storage Temperature Range stg Thermal Resistance (Junction−to−Ambient Thermal Resistance (Junction−to−Case Thermal ...

Page 4

Table 5. TTL DC CHARACTERISTICS Symbol Characteristic V Output HIGH Voltage OH V Output LOW Voltage OL I Output Short Circuit Current OS NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test ...

Page 5

... ORDERING INFORMATION Device NB100ELT23LD NB100ELT23LDG NB100ELT23LDR2 NB100ELT23LDR2G NB100ELT23LDT NB100ELT23LDTG NB100ELT23LDTR2 NB100ELT23LDTR2G NB100ELT23LMNR4 NB100ELT23LMNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D ...

Page 6

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 7

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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