NCN6010DTBR2 ON Semiconductor, NCN6010DTBR2 Datasheet - Page 8
NCN6010DTBR2
Manufacturer Part Number
NCN6010DTBR2
Description
IC LEVEL SHIFTER SIMCARD 14TSSOP
Manufacturer
ON Semiconductor
Datasheet
1.NCN6010DTBR2.pdf
(16 pages)
Specifications of NCN6010DTBR2
Logic Function
Level Shifter
Input Type
Logic
Output Type
Logic
Differential - Input:output
No/No
Propagation Delay (max)
50ns
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-25°C ~ 85°C
Package / Case
14-TSSOP
Supply Voltage
2.7 V ~ 3.6 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Channels
-
Data Rate
-
Other names
NCN6010DTBR2OSTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCN6010DTBR2(NCN6010)
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
NCN6010DTBR2G
Manufacturer:
ON/安森美
Quantity:
20 000
Power Down Operation
PWR_ON or by the STOP pin condition. In both cases, the
communication I/O session is terminated immediately,
according to the ISO7816-3 sequence as depicted in
Figure 4. When the PWR_ON signal is set Low, the
NCN6010 goes to the power down mode. According to the
ISO7816-3 procedure defined to deactivate the SIM
contacts, the input pins I/O, CLOCK and RESET must be
Low before the PWR_ON is taken Low. When the
Force SIM_RST to Low
Force SIM_CLK to Low, unless it is already in this state
Force SIM_IO to Low
Shut Off the SIM_V
The power down mode can be initiated by either the
CC
supply
Figure 4. ISO7816-3 Power Down Sequence
Figure 3. Power On Sequence
http://onsemi.com
NCN6010
SIM_RST
SIM_CLK
SIM_IO
SIM_V
8
CC
PWR_ON is Low, the SIM_IO, SIM_CLK and SIM_RST
pins are forced to Low and the SIM_VCC pin is left floating.
and SIM_RST are forced Low, the SIM_VCC being left
floating, until the STOP pin is taken High again.
the operation and run the Power Down of the card by forcing
PWR_ON input to Low. The NCN6010 fulfills the power
sequence as defined by the ISO/CEI 7816-3 norm (see
oscillogram given in Figure 5).
When the STOP signal is Low, the SIM_IO, SIM_CLK
When the card is extracted, the external MPU shall detect
T0
T1
UNDEFINED
T2
T3
T