MAX7304ETG+ Maxim Integrated, MAX7304ETG+ Datasheet
MAX7304ETG+
Specifications of MAX7304ETG+
Related parts for MAX7304ETG+
MAX7304ETG+ Summary of contents
Page 1
Level-Translating GPIO and LED Driver with High Level of Integrated ESD Protection General Description The MAX7304 consists of 16 port GPIOs, with 12 push- pull GPIOs and four open-drain GPIOs configurable as PWM-controlled LED drivers. The device supports a 1.62V ...
Page 2
... Port Sink Current PORT15–PORT12 Input High Voltage PORT_ Input Low Voltage PORT_ Input Leakage Current PORT11–PORT0 Input Leakage Current PORT15–PORT12 Maxim Integrated 2 I Continuous Power Dissipation (T + 0.3V) TQFN (derate 15.4mW/NC above +70NC)..................1229mW CC WLP (derate 19.2mW/NC above +70NC)......................850mW Operating Temperature Range ...
Page 3
... Data Setup Time SCL Clock Low Period SCL Clock High Period Rise Time of Both SDA and SCL Signals, Receiving Fall Time of Both SDA and SCL Signals, Receiving Fall Time of SDA Signal, Transmitting Maxim Integrated 2 I SYMBOL CONDITIONS 1.62V and I CC ...
Page 4
... -40° SINK CURRENT (mA) Maxim Integrated SYMBOL CONDITIONS t (Notes (Note TIMEOUT IEC 61000-4-2 Air-Gap Discharge IEC 61000-4-2 Contact Discharge Human Body Model = +25NC. Specifications over temperature are guaranteed by design. A and t measured between 0.8V and 2.1V. ...
Page 5
... SUPPLY VOLTAGE (V) CONSTANT-CURRENT GPIO OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE (PORT15–PORT12 3. -40° 0.5 1.0 1.5 OUTPUT VOLTAGE (V) Maxim Integrated Typical Operating Characteristics (continued +85° -40°C A 2.8 3.0 3.2 3.4 3 +85° +25°C A 2.0 2.5 3.0 MAX7304 2 I C-Interfaced 16-Port, CONSTANT-CURRENT GPIO OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE (PORT15 – ...
Page 6
... C5 PORT11 10 C4 PORT10 11 D5 PORT9 12 E5 PORT8 AD0 15 D3 SDA 16 E3 SCL 17 E2 INT Maxim Integrated I TOP VIEW (BUMPS SIDE DOWN PORT8 11 PORT9 B PORT10 10 9 PORT11 C 8 GND *EP 7 PORT12 GPIO Port 5. Push-pull I/O. ...
Page 7
... MAX7304 INT SDA SCL INTERFACE AD0 BUS TIMEOUT Maxim Integrated Positive Supply Voltage. Bypass to GND with a 0.1FF capacitor as close as possible to the device. GPIO Port 0. Push-pull I/O. GPIO Port 1. Push-pull I/O. GPIO Port 2. Push-pull I/O. GPIO Port 3. Push-pull I/ O. GPIO Port 4. Push-pull I/O. Exposed Pad (TQFN Only). Internally connected to GND. Connect to a large ground plane to maximize thermal performance ...
Page 8
... R/W 0x52 0x00 R/W 0x53 0x00 R/W Maxim Integrated 2 I C-Interfaced 16-Port, constant-current and PWM intensity control. The maximum constant-current level for each open-drain LED port is 20mA. The intensity of the LED on each open-drain port can be individually adjusted through a 256-step PWM control. The port also features LED fading. ...
Page 9
... GPIO direction 1 register bits D[7:0] correspond with PORT7–PORT0 (see Table 7 section). GPIO direction 2 register bits D[7:0] correspond with PORT15–PORT8 (see Table 8 section). Set the corresponding bit configure as input and 1 to configure as output. Maxim Integrated I REGISTER FUNCTION PORT12 LED configuration PORT13 LED configuration ...
Page 10
... Bit D0 selects the global current values between 10mA and 20mA. This setting only applies to the LED driver enabled pins, PORT15–PORT12. Maxim Integrated The common PWM ratio register stores the common con- stant-current output PWM duty cycle (see Register Tables ...
Page 11
... Fade out decreases an LED’s PWM intensity in 16 even steps, from its current value to zero. Fading occurs automatically in any of the following scenarios: Maxim Integrated Change the common PWM register value from any value to zero to cause all ports using the common PWM register settings to fade out ...
Page 12
... HD, STA t R START CONDITION Figure 1. Two-Wire Serial Interface Timing Details Maxim Integrated LED Blink Table 22 Figure 1 The device operates as a slave that sends and receives data through an I interface uses a serial-data line (SDA) and a serial- clock line (SCL) to achieve bidirectional communication between master(s) and slave(s) ...
Page 13
... SCL SDA BY TRANSMITTER SDA BY RECEIVER S Figure 4. Acknowledge Maxim Integrated 2 I C-Interfaced 16-Port, Bit Transfer The master generates the 9th clock pulse, and the recipi- ent pulls down SDA during the acknowledge clock pulse; therefore, the SDA line is stable low during the high period of the clock pulse ...
Page 14
... COMMAND BYTE IS STORED ON RECEIPT OF ACKNOWLEDGE FROM MAX7304 S SLAVE ADDRESS Figure 6. Command Byte Received Maxim Integrated I Slave Addresses The device features a 20ms (min) bus timeout on the 2-wire serial interface, largely to prevent the device from holding the SDA I/O low during a read transaction, should the SCL lock up for any reason before a serial transac- tion is completed ...
Page 15
... Figure 7. Command and Single Data Byte Received ACKNOWLEDGE FROM MAX7304 S SLAVE ADDRESS R/W Figure 8. N Data Bytes Received Maxim Integrated 2 I Address autoincrementing allows the device to be configured with fewer transmissions by minimizing the number of times the command address needs to be sent. The command address (0x31 to 0x5B) stored in the device increments after each data byte is written or read ...
Page 16
... Maxim Integrated I Staggered PWM All device pins meet the Q2.5kV Human Body Model ESD tolerances. The GPIOs meet IEC 61000-4-2 ESD protec- tion. The IEC test stresses consist of 10 consecutive ESD discharges per polarity at the maximum specified level and below (per IEC 61000-4-2) ...
Page 17
... PORT13 D0 PORT12 Table 7. GPIO Direction 1 Register (0x34) REGISTER BIT DESCRIPTION D7 PORT7 D6 PORT6 D5 PORT5 D4 PORT4 D3 PORT3 D2 PORT2 D1 PORT1 D0 PORT0 Maxim Integrated 2 I VALUE FUNCTION — — timeout enabled timeout disabled VALUE FUNCTION 0000 — 0 GPIO function 1 LED driver enable ...
Page 18
... Table 9. GPO Output Mode 1 Register (0x36) REGISTER BIT DESCRIPTION D7 PORT7 D6 PORT6 D5 PORT5 D4 PORT4 D3 PORT3 D2 PORT2 D1 PORT1 D0 PORT0 Maxim Integrated 2 I VALUE FUNCTION 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin ...
Page 19
... REGISTER BIT DESCRIPTION D7 PORT7 D6 PORT6 D5 PORT5 D4 PORT4 D3 PORT3 D2 PORT2 D1 PORT1 D0 PORT0 Maxim Integrated 2 I VALUE FUNCTION 0 Port is an open-drain output 0 Port is an open-drain output 0 Port is an open-drain output 0 Port is an open-drain output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output ...
Page 20
... PORT8 Table 13. GPIO Values 1 Register (0x3A) REGISTER BIT DESCRIPTION D7 PORT7 D6 PORT6 D5 PORT5 D4 PORT4 D3 PORT3 D2 PORT2 D1 PORT1 D0 PORT0 Maxim Integrated 2 I VALUE FUNCTION 0 PORT15 supplied PORT15 supplied PORT14 supplied PORT14 supplied PORT13 supplied ...
Page 21
... Table 15. GPIO Level-Shifter Enable (0x3C) REGISTER BIT DESCRIPTION D7 PORT7/PORT15 D6 PORT6/PORT14 D5 PORT5/PORT13 D4 PORT4/PORT12 D3 PORT3/PORT11 D2 PORT2/PORT10 Maxim Integrated 2 I VALUE FUNCTION 0 Clear PORT15 low 1 Set PORT15 high* 0 Clear PORT14 low 1 Set PORT14 high* 0 Clear PORT13 low 1 Set PORT13 high* ...
Page 22
... Reserved timeout D5 interrupt enable D4 GPIO enable D3 GPIO reset D[2:0] Fade-in/out time Maxim Integrated 2 I VALUE FUNCTION 0 Level shifting disabled Level shift between PORT1 and PORT9 enabled; 1 direction controlled by GPIO direction 2 register (0x35) 0 Level shifting disabled Level shift between PORT0 and PORT8 enabled; ...
Page 23
... Common PWM ratio is 0/256 Common PWM ratio is 1/256 Common PWM ratio is 2/256 Common PWM ratio is 3/256 Common PWM ratio is 252/256 Common PWM ratio is 253/256 Common PWM ratio is 254/256 Common PWM ratio is 256/256 (100% duty cycle) Maxim Integrated I REGISTER DATA RESERVED 0 0 ...
Page 24
... Table 22. PORT12–PORT15 LED Configuration Registers (0x54 to 0x57) REGISTER BIT DESCRIPTION D[7:6] Don’t care D5 Common PWM D[4:2] Blink period D[1:0] Blink-on time Maxim Integrated I VALUE 0000000 — timeout has occurred since last read or POR timeout has occurred since last read or POR. This ...
Page 25
... PORT0 Table 24. Interrupt Mask 2 Register (0x59) REGISTER BIT DESCRIPTION D7 PORT15 D6 PORT14 D5 PORT13 D4 PORT12 D3 PORT11 D2 PORT10 D1 PORT9 D0 PORT8 Maxim Integrated 2 I VALUE FUNCTION 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked ...
Page 26
... Table 26. GPI Trigger Mode 2 Register (0x5B) REGISTER BIT DESCRIPTION D7 PORT15 D6 PORT14 D5 PORT13 D4 PORT12 D3 PORT11 D2 PORT10 D1 PORT9 D0 PORT8 Maxim Integrated 2 I VALUE FUNCTION 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts ...
Page 27
... RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 24 TQFN-EP 25 WLP Maxim Integrated 2 I PROCESS: BiCMOS MAX7304ETG+ MAX7304EWA+** +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. **Future product—contact factory for availability. PACKAGE CODE OUTLINE NO. T243A3+1 W252F2+1 ...
Page 28
... Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed ...