MAX9209EUM/V+T Maxim Integrated, MAX9209EUM/V+T Datasheet - Page 7
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MAX9209EUM/V+T
Manufacturer Part Number
MAX9209EUM/V+T
Description
Serializers & Deserializers - Serdes 21-Bit DC-balanced LVDS Serializer
Manufacturer
Maxim Integrated
Type
Serializerr
Datasheet
1.MAX9209EUMV.pdf
(18 pages)
Specifications of MAX9209EUM/V+T
Rohs
yes
Data Rate
300 Mbit/s
Input Type
LVCMOS/LVTTL
Output Type
LVDS
Number Of Inputs
21
Number Of Outputs
3
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-48
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
16, 18, 19, 20, 22, 23, 25
1, 3, 4, 44, 45, 47, 48,
6, 7, 9, 10, 12, 13, 15
5, 11, 17, 24, 46
2, 8, 14, 21
31, 36, 42
TSSOP
28, 30
26
27
29
32
33
34
35
37
38
39
40
41
43
—
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PIN
38, 39, 41, 42, 43, 45, 46
10, 12, 13, 14, 16, 17, 19
1, 3, 4, 6, 7, 9, 48
5, 11, 18, 40, 47
2, 8, 15, 44
25, 30, 36
22, 24
TQFN
20
21
23
26
27
28
29
31
32
33
34
35
37
—
Programmable DC-Balanced
TxIN14–TxIN20
TxIN7–TxIN13
TxCLK OUT+
TxIN0–TxIN6
TxCLK OUT-
LVDS GND
LVDS V
PWRDWN
TxCLK IN
PLL GND
TxOUT2+
TxOUT1+
TxOUT0+
TxOUT2-
TxOUT1-
TxOUT0-
PLL V
DCB/NC
NAME
GND
V
EP
CC
CC
CC
5V Tolerant LVTTL/LVCMOS Channel 0 Data Inputs.
Internally pulled down to GND.
Digital Supply Voltage
Ground
5V Tolerant LVTTL/LVCMOS Channel 1 Data Inputs.
Internally pulled down to GND.
5V Tolerant LVTTL/LVCMOS Channel 2 Data Inputs.
Internally pulled down to GND.
5V Tolerant LVTTL/LVCMOS Parallel Rate Clock Input.
Internally pulled down to GND.
5V Tolerant LVTTL/LVCMOS Power-Down Input. Internally
pulled down to GND. Outputs are high impedance when
PWRDWN = low or open.
PLL Ground
PLL Supply Voltage
LVDS Ground
Noninverting LVDS Parallel Rate Clock Output
Inverting LVDS Parallel Rate Clock Output
Noninverting Channel 2 LVDS Serial Data Output
Inverting Channel 2 LVDS Serial Data Output
LVDS Supply Voltage
Noninverting Channel 1 LVDS Serial Data Output
Inverting Channel 1 LVDS Serial Data Output
Noninverting Channel 0 LVDS Serial Data Output
Inverting Channel 0 LVDS Serial Data Output
LVTTL/LVCMOS DC-Balance Programming Input:
MAX9209: pulled up to V
MAX9213: pulled up to V
See Table 1.
Exposed Paddle (TQFN Only). Solder to ground.
21-Bit Serializers
FUNCTION
CC
CC
Pin Description
7