MAX3885EVKIT Maxim Integrated, MAX3885EVKIT Datasheet - Page 2

• Manufacturer Part Number: MAX3885EVKIT
• Description: Serializers & Deserializers - Serdes Evaluation Kit for the MAX3885
• Manufacturer: Maxim Integrated

Specifications of MAX3885EVKIT

• Data Rate: 2.488 Gbps, 155 Mbps
• Number Of Inputs: 1
• Number Of Outputs: 16
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Maximum Power Dissipation: 1000 mW
• Operating Current: 200 mA
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

The MAX3885 EV kit simplifies evaluation of the
MAX3885 deserializer. The EV kit operates from a sin-
gle +3.3V supply and includes all the external compo-
nents necessary to interface with 3.3V PECL and LVDS
logic.
Each PECL input (SCLK+, SCLK-, SD+, SD-) is termi-
nated on the EV board with the Thevenin equivalent of
53Ω to (V
by the output of any 3.3V PECL device, such as a
clock-and-data-recovery circuit (e.g., the MAX3875).
For inputs other than directly coupled 3.3V PECL, provi-
sion is made on the board to AC couple the input.
Remove the trace between C2, C4, C6, and C8 and
install 0.1µF 0603 ceramic capacitors (see the
MAX3885 data sheet).
All LVDS outputs (PCLK+, PCLK-, PD_+, PD_-) are dif-
ferentially terminated with 100Ω resistors between com-
plementary outputs. Each output can directly drive an
LVDS input or a high-impedance input oscilloscope
(see Connecting LVDS Outputs to 50 Ω Oscilloscope
Inputs ). When driving an LVDS input that already
includes 100Ω differential termination, remove the ter-
mination resistor corresponding to the appropriate
LVDS output.
MAX3885 Evaluation Kit
2
_______________Detailed Description
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CC
- 2V). These inputs can be driven directly
The synchronization inputs (SYNC+, SYNC-) are inter-
nally terminated LVDS inputs with 100Ω differential
input resistance. Ensure that LVDS devices driving
these inputs are not redundantly terminated.
All signal inputs and outputs use coupled 50Ω trans-
mission lines. All input signal lines are of equal length to
minimize propagation-delay skew. Likewise, all output
signal lines are of equal length.
To monitor an LVDS signal on a 50Ω input oscilloscope,
remove the differential load resistor between the com-
plementary outputs and AC couple each output to an
oscilloscope input. For example, to observe the PD0 sig-
nal on a 50Ω input instrument, remove resistor R15 from
the EV board and place a capacitor or DC block in
series with each output (PD0+ or PD0-) and the instru-
ment input. Do not connect MAX3885 outputs directly
to 50Ω inputs or terminations to ground. Choose a
coupling capacitor large enough in value to prevent pat-
tern-dependent distortion of the output signal.
__________Applications Information
Connecting LVDS Outputs to
50 Ω Oscilloscope Inputs