MAX3268C/D Maxim Integrated, MAX3268C/D Datasheet - Page 12
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MAX3268C/D
Manufacturer Part Number
MAX3268C/D
Description
Special Purpose Amplifiers
Manufacturer
Maxim Integrated
Series
MAX3264, MAX3265, MAX3268, MAX3269, MAX3765, MAX3768r
Datasheet
1.MAX3268CD.pdf
(17 pages)
+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
Figure 6. PECL Output Circuit
The buffer’s output impedance is determined by the par-
allel combination of internal and external pullup resistors,
which are chosen to match the impedance of the trans-
mission line (Figure 1). The output buffer can be AC- or
DC-coupled to the load.
The MAX3268/MAX3269/MAX3768 offer an industry-
standard PECL output. The PECL outputs should be
terminated to V
put circuit. The squelch function forces OUT+ to a high
level and OUT- to a low level when the input is below
the programmed LOS threshold. In the 10-pin µMAX,
SQUELCH is left unconnected.
The loss-of-signal threshold is programmed by external
resistor R
the Typical Operating Characteristics.
The coupling capacitors (C
ed to minimize the receiver’s deterministic jitter. Jitter is
12
__________________Design Procedure
______________________________________________________________________________________
TH
Program the LOS Assert Threshold
. See the LOS Threshold vs. R
Select the Coupling Capacitors
GND
CC
V
CC
- 2V. Figure 6 shows the PECL out-
IN,
PECL Output Buffer
C
OUT
) should be select-
ESD
STRUCTURES
OUT+
OUT-
TH
graph in
minimized when the input low-frequency cutoff (f
placed at a low frequency:
For Fibre Channel, Gigabit Ethernet, or other applica-
tions using 8B/10B data coding, select (C
0.01µF, which provides f
or other applications using scrambled NRZ data, select
(C
To maintain stability, it is important to keep a one-
decade separation between f
cutoff (f
cuit.
For Fibre Channel, Gigabit Ethernet, or other applica-
tions using 8B/10B data coding, leave pins CAZ1, and
CAZ2 open (f
applications using scrambled NRZ data, select C
0.1µF, which typically provides f
Figure 7. CML Output Circuit
IN
, C
Select the Offset-Correction Capacitor
OUT
OC
100Ω
) associated with the DC-offset-correction cir-
f
) ≥ 0.1µF, which provides f
OC
(MAX3264/MAX3265 TSSOP Only)
GND
OC
= 75 / [2π 60k (C
= 200 x 10
V
CC
f
= 2MHz). For ATM/SONET or other
IN
LEVEL
100Ω
= 1 / [2π(50)(C)]
IN
-6
< 320kHz. For ATM/SONET
/ (C
IN
AZ
AZ
OC
and the low-frequency
+ 100pF)
+ 100pF)]
= 2kHz.
IN
< 32kHz.
OUT+
OUT-
IN,
ESD
STRUCTURES
C
OUT
IN
AZ
) is
) ≥
≥