74LVC16374APAG IDT, 74LVC16374APAG Datasheet

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74LVC16374APAG

Manufacturer Part Number
74LVC16374APAG
Description
Flip Flops 16-bit Edge-Trig D-Type Flip-Flop
Manufacturer
IDT
Datasheet

Specifications of 74LVC16374APAG

Rohs
yes
Number Of Circuits
1
Logic Family
74LVC
Logic Type
D-Type Flip-Flop
Polarity
Inverting
Propagation Delay Time
4.5 ns
Supply Voltage - Max
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-48
Minimum Operating Temperature
- 40 C
Supply Voltage - Min
3 V
Part # Aliases
IDT74LVC16374APAG
FEATURES:
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• CMOS power levels (0.4μ μ μ μ μ W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2006 Integrated Device Technology, Inc.
IDT74LVC16374A
3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
1
1
CLK
machine model (C = 200pF, R = 0)
1
OE
CC
CC
D
1
= 3.3V ± 0.3V, Normal Range
= 2.7V to 3.6V, Extended Range
INDUSTRIAL TEMPERATURE RANGE
1
48
47
SK(o)
(Output Skew) < 250ps
TO SEVEN OTHER CHANNELS
D
C
3.3V CMOS 16-BIT
EDGE-TRIGGERED D-TYPE
FLIP-FLOP WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
2
1
Q
1
1
DESCRIPTION:
advanced dual metal CMOS technology. This high-speed, low-power
register is ideal for use as a buffer register for data synchronization and
storage. The Output Enable (OE) and clock (CLK) controls are organized
to operate this device as two 8-bit registers or one 16-bit register with
common clock. Flow-through organization of signal pins simplifies layout.
All inputs are designed with hysteresis for improved noise margin.
This feature allows the use of this device as a translator in a mixed 3.3V/
5V supply system.
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
2
2
CLK
2
OE
The LVC16374A 16-bit edge-triggered D-type flip-flop is built using
All pins of the LVC16374A can be driven from either 3.3V or 5V devices.
The LVC16374A has been designed with a ±24mA output driver. This
D
1
36
25
24
TO SEVEN OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
D
C
IDT74LVC16374A
OCTOBER 2008
DSC-4752/5
13
2
Q
1

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