MAX7318ATG-T Maxim Integrated, MAX7318ATG-T Datasheet - Page 9

• Manufacturer Part Number: MAX7318ATG-T
• Description: Interface - I/O Expanders 16-Bit I/O Port Expander
• Manufacturer: Maxim Integrated
• Series: MAX7318r

Specifications of MAX7318ATG-T

• Maximum Operating Frequency: 400 KHz
• Operating Supply Voltage: 2 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-24 EP
• Output Current: 43 mA
• Power Dissipation: 1667 mW

The MAX7318’s eight registers are configured to oper-
ate as four register pairs: input ports, output ports,
polarity inversion ports, and configuration ports. After
sending 1 byte of data to one register, the next byte is
sent to the other register in the pair. For example, if the
first byte of data is sent to output port 2, then the next
byte of data is stored in output port 1. An unlimited
number of data bytes can be sent in one write transmis-
sion. This allows each 8-bit register to be updated inde-
pendently of the other registers.
Figure 8. Read from Register
Figure 9. Read from Input Registers
SCL
S
TRANSFER OF DATA CAN BE STOPPED AT ANY TIME BY A STOP CONDITION.
READ FROM PORT 1
DATA INTO PORT 1
READ FROM PORT 2
DATA INTO PORT 2
INT
S
SLAVE ADDRESS
1
TRANSFER OF DATA CAN BE STOPPED ANYTIME BY A STOP CONDITION. WHEN THE
STOP CONDITION OCCURS, DATA PRESENT AT THE LAST ACKNOWLEDGE PHASE IS
VALID (OUTPUT MODE) AND COMMAND BYTE HAS PREVIOUSLY BEEN SET TO REGISTER 00.
2-Wire-Interfaced, 16-Bit, I/O Port Expander
2
SLAVE ADDRESS
3
with Interrupt and Hot-Insertion Protection
4
5
_______________________________________________________________________________________
R/W
t
6
IV
R/W
0 A
7
ACKNOWLEDGE
8
FROM SLAVE
1
9
A
COMMAND BYTE
t
IR
7
ACKNOWLEDGE
FROM SLAVE
PORT 1 DATA
A S
ACKNOWLEDGE
FROM MASTER
0
A
SLAVE ADDRESS
7
ACKNOWLEDGE
FROM SLAVE
RECEIVER BECOMES SLAVE TRANSMITTER
PORT 2 DATA
MASTER TRANSMITTER BECOMES
MASTER RECEIVER AND SLAVE
R/W
To read the device data, the bus master must first send
the MAX7318 address with the R/W bit set to zero, fol-
lowed by the command byte, which determines which
register is accessed. After a restart, the bus master
must then send the MAX7318 address with the R/W bit
set to 1. Data from the register defined by the com-
mand byte is then sent from the MAX7318 to the master
(Figures 8, 9).
1 A
ACKNOWLEDGE
FROM MASTER
0
UPPER BYTE OF REGISTER
DATA FROM LOWER OR
MSB
A
7
DATA
PORT 1 DATA
LSB
ACKNOWLEDGE
FROM SLAVE
A
ACKNOWLEDGE
FROM MASTER
0
A
7
UPPER BYTE OF REGISTER
Reading Port Registers
DATA FROM LOWER OR
MSB
PORT 2 DATA
DATA
NONACKNOWLEDGE
FROM MASTER
LSB
0
1
NA P
P
9