XRT83SL314ES Exar, XRT83SL314ES Datasheet - Page 18

• Manufacturer Part Number: XRT83SL314ES
• Description: LIN Transceivers 14 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL314ES

• Product Category: LIN Transceivers
• Rohs: yes

XRT83SL314
REV. 1.0.1
F
To reduce system noise and power consumption, the XRT83SL314 offers an ALL T1/E1 mode. Since most
line card designs are configured to operate in T1 or E1 only, the LIU can be selected to shut off the timing
references for the mode not being used by programming the appropriate global register. By default the ALL
T1/E1 mode is enabled (ALLT1/E1 bit = "0"). If the LIU is configured for T1, all E1 clock references and the
8kHz reference are shut off internally to the chip. This reduces the amount of internal clocks switching within
the LIU, hence reducing noise and power consumption. In E1 mode, the T1 clock references are internally
shut off, however the 8kHz reference is available. To disable this feature, the ALLT1/E1 bit must be set to a "1"
in the appropriate global register.
The receive path of the XRT83SL314 LIU consists of 14 independent T1/E1/J1 receivers. The following
section describes the complete receive path from RTIP/RRING inputs to RCLK/RPOS/RNEG outputs. A
simplified block diagram of the receive path is shown in Figure 3.
F
1.1
2.0 RECEIVE PATH LINE INTERFACE
IGURE
IGURE
2. S
3. S
ALL T1/E1 Mode
RPOS
RNEG
RCLK
IMPLIFIED
IMPLIFIED
HDB3/B8ZS
Decoder
Input Clock
B
B
LOCK
LOCK
D
D
IAGRAM OF THE
IAGRAM OF THE
Synthesizer
MCLKE1Nout
MCLKT1Nout
Attenuator
MCLKE1out
MCLKT1out
Rx Jitter
Clock
8kHzOUT
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
C
R
Programmable
Programmable
LOCK
ECEIVE
Reference
Clock & Data
1.544MHz
2.048MHz
Internal
Recovery
15
S
YNTHESIZER
P
ATH
Peak Detector
& Slicer
8kHz
2.048MHz
1.544Mhz
2.048/4.096/8.192/16.384 MHz
1.544/3.088/6.176/12.352MHz
Rx Equalizer
Control
Rx Equalizer
xr
RTIP
RRING