MAX9760ETI-T Maxim Integrated, MAX9760ETI-T Datasheet - Page 18
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MAX9760ETI-T
Manufacturer Part Number
MAX9760ETI-T
Description
Audio Amplifiers
Manufacturer
Maxim Integrated
Datasheet
1.MAX9763ETI.pdf
(31 pages)
Specifications of MAX9760ETI-T
Output Type
2-Channel Stereo
Output Power
3 W x 2 at 3 Ohms, 0.2 W x 2 at 16 Ohms
Thd Plus Noise
0.01 % at 4 Ohms at 2 W, 0.002 % at 16 Ohms at 125 mW
Operating Supply Voltage
5 V
Maximum Power Dissipation
1667 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFN EP
Audio Load Resistance
32 Ohms
Input Signal Type
Single
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Table 5. Control Register Format
In read mode (R/W = 1), the MAX9760/MAX9762 write
the contents of the selected register to the bus. The
direction of the data flow reverses following the
address acknowledge by the MAX9760/MAX9761. The
master device reads the contents of all registers,
including the read-only status register.
the status register format.
The MAX9760/MAX9762 include an interrupt output
(INT) that can indicate to a master device that an event
has occurred. INT is triggered when the state of HPS
changes. During normal operation, INT idles high. If a
headphone is inserted/removed from the jack and that
action is detected by HPS, INT pulls the line low. INT
remains low until a read data operation is executed.
The MAX9760/MAX9762 are compatible with existing I
systems. SCL and SDA are high-impedance inputs; SDA
has an open drain that pulls the data line low during the
ninth clock pulse. The communication protocol supports
the standard I
address is ignored. The MAX9760/MAX9762 addresses
are compatible with the 7-bit I
only. No 10-bit formats are supported.
18
BIT
7
6
5
4
3
2
1
0
REGISTER
______________________________________________________________________________________
ADDRESS
SPKR/HP
GAINA/B
IN1/IN2
HPS_D
NAME
X
X
X
X
2
C 8-bit communications. The general call
Don’t Care
Don’t Care
Don’t Care
Don’t Care
VALUE
0*
0*
0*
0*
1
1
1
1
2
C addressing protocol
Interrupt Output (INT)
0000 0011
Speaker mode selected
Headphone mode
selected
Gain-setting A selected
Gain-setting B selected
Automatic headphone
detection enabled
Automatic headphone
detection disabled
(HPS ignored).
Input 1 selected
Input 2 selected
Read Data Format
I
DESCRIPTION
2
C Compatibility
Table
—
—
—
—
6 shows
2
C
The MAX9760–MAX9763 feature speaker amplifiers
designed to drive a load differentially, a configuration
referred to as bridge-tied load (BTL). The BTL configu-
ration (Figure 8) offers advantages over the single-
ended configuration, where one side of the load is
connected to ground. Driving the load differentially
doubles the output voltage compared to a single-
ended amplifier under similar conditions. Thus, the
devices’ differential gain is twice the closed-loop gain
of the input amplifier. The effective gain is given by:
Substituting 2 x V
ing equations yields four times the output power due to
doubling of the output voltage:
Since the differential outputs are biased at midsupply,
there is no net DC voltage across the load. This elimi-
nates the need for DC-blocking capacitors required for
single-ended amplifiers. These capacitors can be
large, expensive, consume board space, and degrade
low-frequency performance.
Figure 8. Bridge-Tied Load Configuration
Applications Information
+1
-1
OUT(P-P)
P
V
A
OUT
RMS
VD
= ×
=
=
BTL Speaker Amplifiers
2
V
V
for V
RMS
OUT P P
R
R
R
2 2
L
IN
F
OUT(P-P)
2
(
−
)
into the follow-
V
2 x V
V
OUT(P-P)
OUT(P-P)
OUT(P-P)