MAX9761ETI-T Maxim Integrated, MAX9761ETI-T Datasheet - Page 20
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MAX9761ETI-T
Manufacturer Part Number
MAX9761ETI-T
Description
Audio Amplifiers
Manufacturer
Maxim Integrated
Datasheet
1.MAX9763ETI.pdf
(31 pages)
Specifications of MAX9761ETI-T
Output Type
2-Channel Stereo
Output Power
3 W x 2 at 3 Ohms, 0.2 W x 2 at 16 Ohms
Thd Plus Noise
0.01 % at 4 Ohms at 2 W, 0.002 % at 16 Ohms at 125 mW
Operating Supply Voltage
5 V
Maximum Power Dissipation
1667 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFN EP
Audio Load Resistance
32 Ohms
Input Signal Type
Single
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
External feedback components set the gain of the
MAX9760–MAX9763. Resistor R
input amplifier (A
the second stage amplifier (A
Combining A
ended gain of the device as follows:
As shown, the two-stage amplifier architecture results
in a noninverting gain configuration, preserving
absolute phase through the MAX9760–MAX9763. The
gain of the device in BTL mode is twice that of the sin-
gle-ended mode. Choose R
and R
The input capacitor (C
a highpass filter that removes the DC bias from an
incoming signal. The AC-coupling capacitor allows the
amplifier to bias the signal to an optimum DC level.
Assuming zero-source impedance, the -3dB point of
the highpass filter is given by:
Choose R
section. Choose the C
the lowest frequency of interest. Setting f
affects the amplifier’s low-frequency response. Use
capacitors whose dielectrics have low-voltage coeffi-
cients, such as tantalum or aluminum electrolytic.
Capacitors with high-voltage coefficients, such as
ceramics, may result in an increased distortion at low
frequencies.
Other considerations when designing the input filter
include the constraints of the overall system,
the actual frequency band of interest, and click-and-
pop suppression.
20
A
V
______________________________________________________________________________________
=
F
A
between 15kΩ and 100kΩ.
VIN
A
VIN
IN
×
VIN
A
according to the Gain-Setting Resistors
= −
VOUT
and A
VIN
f
−
10
R
3
dB
IN
= −
) and resistor R
k
Ω
IN
VOUT
IN
=
), in conjunction with R
,
10
2π
such that f
R
A
Component Selection
IN
IN
k
R C
, R
VOUT
Ω
VOUT
IN IN
1
between 10kΩ and 15kΩ
IN
× −
Gain-Setting Resistors
IN
and R
= −
):
sets the gain of the
-3dB
F
10
10
sets the gain of
R
F
R
k
F
k
F
set the single-
Ω
Ω
-3dB
is well below
= +
Input Filter
IN
too high
, forms
R
R
IN
F
The MAX9760/MAX9763 require output-coupling
capacitors to operate in single-ended (headphone)
mode. The output-coupling capacitor blocks the DC
component of the amplifier output, preventing DC cur-
rent from flowing to the load. The output capacitor and
the load impedance form a highpass filter with a -3dB
point determined by:
As with the input capacitor, choose C
f
Setting f
quency response.
Load impedance is a concern when choosing C
Load impedance can vary, changing the -3dB point of
the output filter. A lower impedance increases the cor-
ner frequency, degrading low-frequency response.
Select C
bination yields an adequate response. Select capaci-
tors with low ESR to minimize resistive losses and
optimize power transfer to the load.
BIAS is the output of the internally generated 2.5VDC
bias voltage. The BIAS bypass capacitor, C
improves PSRR and THD+N by reducing power supply
and other noise sources at the common-mode bias
node, and also generates the clickless/popless, start-
up/shutdown DC bias waveforms for the speaker ampli-
fiers. Bypass BIAS with a 1µF capacitor to GND.
Proper power-supply bypassing ensures low-noise,
low-distortion performance. Place a 0.1µF ceramic
capacitor from V
capacitance as required by the application, typically
100µF. Bypass PV
Locate bypass capacitors as close to the device as
possible.
The MAX9760–MAX9763 feature multiple gain settings
on each channel, making available different gain and
feedback configurations. The gain-setting resistor (R
is connected between the amplifier output (OUT_+)
and the gain setpoint (GAIN_). An internal multiplexer
switches between the different feedback resistors
-3dB
is well below the lowest frequency of interest.
OUT
-3dB
such that the worst-case load/C
too high affects the amplifier‘s low-fre-
f
−
DD
DD
3
dB
with a 100µF capacitor to GND.
to GND. Add additional bulk
=
2π
Output-Coupling Capacitor
R C
L OUT
1
Supply Bypassing
BIAS Capacitor
OUT
Gain Select
such that
OUT
BIAS
com-
OUT
F
)
.
,