NL17SHT126P5T5G ON Semiconductor, NL17SHT126P5T5G Datasheet

NL17SHT126P5T5G

Manufacturer Part Number

NL17SHT126P5T5G

Description

Buffers & Line Drivers NON-INVERTING 3- STATE BUF

Manufacturer

ON Semiconductor

Datasheet

1.NL17SHT126P5T5G.pdf (5 pages)

Specifications of NL17SHT126P5T5G

Product Category

Buffers & Line Drivers

Rohs

yes

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NL17SHT126

Noninverting Buffer /

CMOS Logic Level Shifter

with LSTTL−Compatible Inputs

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while maintaining

CMOS low power dissipation.

Low to place the output into the high impedance state.

the output has a full 5 V CMOS level output swing. The input

protection circuitry on this device allows overvoltage tolerance on the

input, allowing the device to be used as a logic−level translator from

3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to

3 V CMOS Logic while operating at the high−voltage power supply.

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the NL17SHT126 to be used to interface 5 V circuits to 3 V

circuits. The output structures also provide protection when

destruction caused by supply voltage − input/output voltage mismatch,

battery backup, hot insertion, etc.

Features

•

August, 2011 − Rev. 0

The NL17SHT126 is a single gate noninverting 3−state buffer

The NL17SHT126 requires the 3−state control input (OE) to be set

The device input is compatible with TTL−type input thresholds and

The NL17SHT126 input structure provides protection when

CMOS−Compatible Outputs: V

High Speed: t

Low Power Dissipation: I

TTL−Compatible Inputs: V

Power Down Protection Provided on Inputs and Outputs

Balanced Propagation Delays

Pin and Function Compatible with Other Standard Logic Families

These are Pb−Free Devices

= 0 V. These input and output structures help prevent device

IN A

= 3.5 ns (Typ) at V

GND

Figure 1. Pinout (Top View)

IN A

Figure 2. Logic Symbol

= 1 mA (Max) at T

= 0.8 V; V

> 0.8 V

= 5 V

OUT Y

= 2 V

; V

OUT Y

= 25°C

< 0.1 V

@Load

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

A Input

ORDERING INFORMATION

= Specific Device Code

= Month Code

http://onsemi.com

PIN ASSIGNMENT

FUNCTION TABLE

CASE 527AE

SOT−953

OE Input

Publication Order Number:

OUT Y

GND

IN A

NL17SHT126/D

MARKING

DIAGRAM

Y Output

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NL17SHT126P5T5G Summary of contents

Page 1

NL17SHT126 Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs The NL17SHT126 is a single gate noninverting 3−state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS ...

Page 2

MAXIMUM RATINGS Symbol V DC Supply Voltage Input Voltage Output Voltage OUT I Input Diode Current IK I Output Diode Current Output Current OUT I DC Supply Current, V and GND ...

Page 3

DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions V Minimum High−Level IH Input Voltage V Maximum Low−Level IL Input Voltage V Minimum High−Level Output Voltage I = − ...

Page 4

... UNDER C TEST L *Includes all probe and jig capacitance Figure 6. Test Circuit ORDERING INFORMATION Device NL17SHT126P5T5G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SWITCHING WAVEFORMS GND ...

Page 5

... PACKAGE OUTLINE X Y *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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