MAX9122EUE Maxim Integrated, MAX9122EUE Datasheet - Page 9

• Manufacturer Part Number: MAX9122EUE
• Description: LVDS Interface IC Quad LVDS Line Driver
• Manufacturer: Maxim Integrated

Because the MAX9121/MAX9122 feature a flow-through
pinout, no special layout precautions are required.
Keep the LVDS and any other digital signals separated
from each other to reduce crosstalk.
For LVDS applications, a four-layer PC board that pro-
vides separate power, ground, LVDS signals, and input
signals is recommended. Isolate the input LVDS signals
from each other to prevent coupling. Isolate the output
LVCMOS/LVTTL signals from each other to prevent
coupling. Separate the input LVDS signals from the out-
put signals planes with the power and ground planes
for best results.
Integrated Termination and Flow-Through Pinout
Figure 4. High-Impedance Delay Test Circuit
Figure 5. High-Impedance Delay Waveforms
EN WHEN EN = GND OR OPEN
EN WHEN EN = V
_______________________________________________________________________________________
OUTPUT WHEN
OUTPUT WHEN
V
V
ID
ID
= +100mV
= -100mV
CC
C
S
S
GENERATOR
1
1
L
= V
= GND FOR t
INCLUDES LOAD AND TEST JIG CAPACITANCE.
CC
Board Layout
1.5V
1.5V
FOR t
t
t
PLZ
PHZ
Quad LVDS Line Receivers with
PZL
PZH
AND t
AND t
50Ω
0.5V
PLZ
PHZ
0.5V
MEASUREMENTS.
EN
EN
MEASUREMENTS.
1/4 MAX9121/MAX9122
TRANSISTOR COUNT: 1354
PROCESS: CMOS
IN_+
IN_-
1.5V
1.5V
DEVICE
UNDER
TEST
V
CC
t
t
PZL
PZH
S
1
R
C
L
L
50%
50%
OUT_
Chip Information
3V
0
3V
0
V
V
V
GND
CC
OL
OH
9